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ARM can only use narrow encoding for low regs.
llvm-svn: 153765
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@ -6857,6 +6857,7 @@ processInstruction(MCInst &Inst,
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// instead of T3. For compatibility with the system 'as'. Make sure the
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// wide encoding wasn't explicit.
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if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||
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!isARMLowRegister(Inst.getOperand(0).getReg()) ||
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(unsigned)Inst.getOperand(2).getImm() > 255 ||
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((!inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) ||
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(inITBlock() && Inst.getOperand(5).getReg() != 0)) ||
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