mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 20:51:52 +01:00
ARM can only use narrow encoding for low regs.
llvm-svn: 153765
This commit is contained in:
parent
25b63f35f8
commit
472cefe371
@ -6857,6 +6857,7 @@ processInstruction(MCInst &Inst,
|
|||||||
// instead of T3. For compatibility with the system 'as'. Make sure the
|
// instead of T3. For compatibility with the system 'as'. Make sure the
|
||||||
// wide encoding wasn't explicit.
|
// wide encoding wasn't explicit.
|
||||||
if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||
|
if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||
|
||||||
|
!isARMLowRegister(Inst.getOperand(0).getReg()) ||
|
||||||
(unsigned)Inst.getOperand(2).getImm() > 255 ||
|
(unsigned)Inst.getOperand(2).getImm() > 255 ||
|
||||||
((!inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) ||
|
((!inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) ||
|
||||||
(inITBlock() && Inst.getOperand(5).getReg() != 0)) ||
|
(inITBlock() && Inst.getOperand(5).getReg() != 0)) ||
|
||||||
|
Loading…
x
Reference in New Issue
Block a user