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Fix ScalarEvolution's Xor handling to not assume that an And
that gets recognized with a SCEVZeroExtendExpr must be an And with a low-bits mask. With r73540, this is no longer the case. llvm-svn: 73594
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@ -2453,9 +2453,12 @@ SCEVHandle ScalarEvolution::createSCEV(Value *V) {
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if (BO->getOpcode() == Instruction::And &&
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if (BO->getOpcode() == Instruction::And &&
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LCI->getValue() == CI->getValue())
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LCI->getValue() == CI->getValue())
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if (const SCEVZeroExtendExpr *Z =
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if (const SCEVZeroExtendExpr *Z =
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dyn_cast<SCEVZeroExtendExpr>(getSCEV(U->getOperand(0))))
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dyn_cast<SCEVZeroExtendExpr>(getSCEV(U->getOperand(0)))) {
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return getZeroExtendExpr(getNotSCEV(Z->getOperand()),
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SCEVHandle ZO = Z->getOperand();
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U->getType());
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if (APIntOps::isMask(getTypeSizeInBits(ZO->getType()),
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CI->getValue()))
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return getZeroExtendExpr(getNotSCEV(ZO), U->getType());
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}
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}
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}
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break;
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break;
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11
test/Analysis/ScalarEvolution/xor-and.ll
Normal file
11
test/Analysis/ScalarEvolution/xor-and.ll
Normal file
@ -0,0 +1,11 @@
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; RUN: llvm-as < %s | opt -scalar-evolution -disable-output -analyze | grep {\\--> %z}
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; ScalarEvolution shouldn't try to analyze %s into something like
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; --> (zext i4 (-1 + (-1 * (trunc i64 (8 * %x) to i4))) to i64)
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define i64 @foo(i64 %x) {
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%a = shl i64 %x, 3
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%t = and i64 %a, 8
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%z = xor i64 %t, 8
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ret i64 %z
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}
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