RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
Code Issues Projects Releases Wiki Activity

[X86] MS inline asm: produce error when encountering "<type> ptr <reg name>"

Browse Source 
Currently "<type> ptr <reg name>" treated as <reg name> in MS inline asm, ignoring the "<type> ptr" completely and possibly ignoring the intention of the user.
Fixed llvm to produce an error when encountering "<type> ptr <reg name>" operands.

For example: andpd xmm1,xmmword ptr xmm1 --> andpd xmm1, xmm1 
though andpd has 2 possible matching formats - andpd xmm, xmm/m128

Patch by: ziv.izhar@intel.com
Differential Revision: http://reviews.llvm.org/D14607

llvm-svn: 254607
This commit is contained in:
Marina Yatsina 2015-12-03 12:17:03 +00:00
parent fb464b3241
commit 477847f6ac
2 changed files with 23 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -1693,12 +1693,14 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
return ParseIntelOperator(IOK_TYPE);
}
bool PtrInOperand = false;
unsigned Size = getIntelMemOperandSize(Tok.getString());
if (Size) {
Parser.Lex(); // Eat operand size (e.g., byte, word).
if (Tok.getString() != "PTR" && Tok.getString() != "ptr")
return ErrorOperand(Tok.getLoc(), "Expected 'PTR' or 'ptr' token!");
Parser.Lex(); // Eat ptr.
PtrInOperand = true;
}
Start = Tok.getLoc();
@ -1754,9 +1756,16 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() {
if (!ParseRegister(RegNo, Start, End)) {
// If this is a segment register followed by a ':', then this is the start
// of a segment override, otherwise this is a normal register reference.
if (getLexer().isNot(AsmToken::Colon))
// In case it is a normal register and there is ptr in the operand this
// is an error
if (getLexer().isNot(AsmToken::Colon)){
if (PtrInOperand){
return ErrorOperand(Start, "expected memory operand after "
"'ptr', found register operand instead");
}
return X86Operand::CreateReg(RegNo, Start, End);
}
return ParseIntelSegmentOverride(/*SegReg=*/RegNo, Start, Size);
}

12
test/MC/X86/intel-syntax-ambiguous.s
View File

@ -45,3 +45,15 @@ add rax, 3
fadd "?half@?0??bar@@YAXXZ@4NA"
// CHECK: error: ambiguous operand size for instruction 'fadd'
// Instruction line with PTR inside check that they don't accept register as memory.
// CHECK: error: expected memory operand after 'ptr', found register operand instead
// CHECK: andps xmm1, xmmword ptr xmm1
andps xmm1, xmmword ptr xmm1
// CHECK: error: expected memory operand after 'ptr', found register operand instead
// CHECK: andps xmmword ptr xmm1, xmm1
andps xmmword ptr xmm1, xmm1
// CHECK: error: expected memory operand after 'ptr', found register operand instead
// CHECK: mov dword ptr eax, ebx
mov dword ptr eax, ebx