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Remove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These will be lowered into load and shuffle instructions.
llvm-svn: 51521
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@ -507,12 +507,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
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def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [IntrNoMem]>;
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llvm_v2f64_ty], [IntrNoMem]>;
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def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
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def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
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llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
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@ -1119,11 +1119,6 @@ static bool isAddressUse(Instruction *Inst, Value *OperandVal) {
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if (II->getOperand(1) == OperandVal)
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if (II->getOperand(1) == OperandVal)
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isAddress = true;
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isAddress = true;
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break;
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break;
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case Intrinsic::x86_sse2_loadh_pd:
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case Intrinsic::x86_sse2_loadl_pd:
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if (II->getOperand(2) == OperandVal)
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isAddress = true;
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break;
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}
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}
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}
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}
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return isAddress;
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return isAddress;
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