diff --git a/lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp b/lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp index 2185517e499..4a1dcd881b5 100644 --- a/lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp +++ b/lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#include "Lanai.h" #include "LanaiInstPrinter.h" +#include "Lanai.h" #include "MCTargetDesc/LanaiMCExpr.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCExpr.h" @@ -138,7 +138,8 @@ bool LanaiInstPrinter::printAlias(const MCInst *MI, raw_ostream &OS) { void LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, StringRef Annotation, const MCSubtargetInfo &STI) { - if (!printAlias(MI, OS) && !printAliasInstr(MI, OS)) printInstruction(MI, OS); + if (!printAlias(MI, OS) && !printAliasInstr(MI, OS)) + printInstruction(MI, OS); printAnnotation(OS, Annotation); } @@ -210,9 +211,11 @@ static void printMemoryBaseRegister(raw_ostream &OS, const unsigned AluCode, const MCOperand &RegOp) { assert(RegOp.isReg() && "Register operand expected"); OS << "["; - if (LPAC::isPreOp(AluCode)) OS << "*"; + if (LPAC::isPreOp(AluCode)) + OS << "*"; OS << "%" << LanaiInstPrinter::getRegisterName(RegOp.getReg()); - if (LPAC::isPostOp(AluCode)) OS << "*"; + if (LPAC::isPostOp(AluCode)) + OS << "*"; OS << "]"; } @@ -254,9 +257,11 @@ void LanaiInstPrinter::printMemRrOperand(const MCInst *MI, int OpNo, // [ Base OP Offset ] OS << "["; - if (LPAC::isPreOp(AluCode)) OS << "*"; + if (LPAC::isPreOp(AluCode)) + OS << "*"; OS << "%" << getRegisterName(RegOp.getReg()); - if (LPAC::isPostOp(AluCode)) OS << "*"; + if (LPAC::isPostOp(AluCode)) + OS << "*"; OS << " " << LPAC::lanaiAluCodeToString(AluCode) << " "; OS << "%" << getRegisterName(OffsetOp.getReg()); OS << "]"; diff --git a/lib/Target/Lanai/LanaiAsmPrinter.cpp b/lib/Target/Lanai/LanaiAsmPrinter.cpp index 27a5e9eabb5..0effa5cc653 100644 --- a/lib/Target/Lanai/LanaiAsmPrinter.cpp +++ b/lib/Target/Lanai/LanaiAsmPrinter.cpp @@ -12,8 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "Lanai.h" #include "InstPrinter/LanaiInstPrinter.h" +#include "Lanai.h" #include "LanaiInstrInfo.h" #include "LanaiMCInstLower.h" #include "LanaiTargetMachine.h" diff --git a/lib/Target/Lanai/LanaiDelaySlotFiller.cpp b/lib/Target/Lanai/LanaiDelaySlotFiller.cpp index f94b0cd8aa0..90157ead965 100644 --- a/lib/Target/Lanai/LanaiDelaySlotFiller.cpp +++ b/lib/Target/Lanai/LanaiDelaySlotFiller.cpp @@ -249,7 +249,8 @@ void Filler::insertDefsUses(MachineBasicBlock::instr_iterator MI, // be inserted in the delay slot of a call/return as these instructions are // expanded to multiple instructions with SP modified before the branch that // has the delay slot. - if (MI->isCall() || MI->isReturn()) RegDefs.insert(Lanai::SP); + if (MI->isCall() || MI->isReturn()) + RegDefs.insert(Lanai::SP); } // Returns true if the Reg or its alias is in the RegSet. diff --git a/lib/Target/Lanai/LanaiRegisterInfo.cpp b/lib/Target/Lanai/LanaiRegisterInfo.cpp index 43524042cb4..5d99f12d7a0 100644 --- a/lib/Target/Lanai/LanaiRegisterInfo.cpp +++ b/lib/Target/Lanai/LanaiRegisterInfo.cpp @@ -11,8 +11,8 @@ // //===----------------------------------------------------------------------===// -#include "Lanai.h" #include "LanaiRegisterInfo.h" +#include "Lanai.h" #include "LanaiSubtarget.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/STLExtras.h" @@ -31,8 +31,7 @@ using namespace llvm; -LanaiRegisterInfo::LanaiRegisterInfo() - : LanaiGenRegisterInfo(Lanai::RCA) {} +LanaiRegisterInfo::LanaiRegisterInfo() : LanaiGenRegisterInfo(Lanai::RCA) {} const uint16_t * LanaiRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { diff --git a/lib/Target/Lanai/LanaiTargetMachine.cpp b/lib/Target/Lanai/LanaiTargetMachine.cpp index bb418f3110c..b43e9702f2b 100644 --- a/lib/Target/Lanai/LanaiTargetMachine.cpp +++ b/lib/Target/Lanai/LanaiTargetMachine.cpp @@ -18,8 +18,8 @@ #include "LanaiTargetTransformInfo.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/Support/FormattedStream.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Target/TargetOptions.h" @@ -50,7 +50,7 @@ static std::string computeDataLayout(const Triple &TT) { static Reloc::Model getEffectiveRelocModel(const Triple &TT, Optional RM) { if (!RM.hasValue()) - return Reloc::Static; + return Reloc::PIC_; return *RM; } diff --git a/lib/Target/Lanai/LanaiTargetObjectFile.cpp b/lib/Target/Lanai/LanaiTargetObjectFile.cpp index a4a6de859cb..65764d09482 100644 --- a/lib/Target/Lanai/LanaiTargetObjectFile.cpp +++ b/lib/Target/Lanai/LanaiTargetObjectFile.cpp @@ -106,8 +106,8 @@ LanaiTargetObjectFile::SelectSectionForGlobal(const GlobalValue *GV, } /// Return true if this constant should be placed into small data section. -bool LanaiTargetObjectFile::isConstantInSmallSection( - const DataLayout &DL, const Constant *CN) const { +bool LanaiTargetObjectFile::isConstantInSmallSection(const DataLayout &DL, + const Constant *CN) const { return isInSmallSection(DL.getTypeAllocSize(CN->getType())); } diff --git a/test/CodeGen/Lanai/mem_alu_combiner.ll b/test/CodeGen/Lanai/mem_alu_combiner.ll index 087ea1cc146..4e6e7736144 100644 --- a/test/CodeGen/Lanai/mem_alu_combiner.ll +++ b/test/CodeGen/Lanai/mem_alu_combiner.ll @@ -3,11 +3,11 @@ ; RUN: FileCheck %s -check-prefix=CHECK-DIS ; CHECK-LABEL: sum, -; CHECK: ++], +; CHECK: ld [%r{{[0-9]+}}++], %r{{[0-9]+}}{{$}} ; CHECK-DIS-LABEL: sum, ; CHECK-DIS-NOT: ++], -define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) #0 { +define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) { entry: %cmp6 = icmp sgt i32 %n, 0 br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup @@ -27,14 +27,9 @@ for.body: ; preds = %for.body.preheader, %i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ] %sum_.07 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ] %arrayidx = getelementptr inbounds i32, i32* %data, i32 %i.08 - %0 = load i32, i32* %arrayidx, align 4, !tbaa !0 + %0 = load i32, i32* %arrayidx, align 4 %add = add nsw i32 %0, %sum_.07 %inc = add nuw nsw i32 %i.08, 1 %exitcond = icmp eq i32 %inc, %n br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body } - -!0 = !{!1, !1, i64 0} -!1 = !{!"int", !2, i64 0} -!2 = !{!"omnipotent char", !3, i64 0} -!3 = !{!"Simple C/C++ TBAA"}