RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
Code Issues Projects Releases Wiki Activity

Use MOVSSmr instead of EXTRACTPSmr in the case of extracting

Browse Source 
vector element 0 for a store, as it's smaller and faster.

llvm-svn: 58483
This commit is contained in:
Dan Gohman 2008-10-31 00:57:24 +00:00
parent 31e64cbf49
commit 481e1fd0a6
2 changed files with 16 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/X86ISelLowering.cpp
View File

@ -4194,11 +4194,15 @@ X86TargetLowering::LowerEXTRACT_VECTOR_ELT_SSE4(SDValue Op,
} else if (VT == MVT::f32) {
// EXTRACTPS outputs to a GPR32 register which will require a movd to copy
// the result back to FR32 register. It's only worth matching if the
// result has a single use which is a store or a bitcast to i32.
// result has a single use which is a store or a bitcast to i32. And in
// the case of a store, it's not worth it if the index is a constant 0,
// because a MOVSSmr can be used instead, which is smaller and faster.
if (!Op.hasOneUse())
return SDValue();
SDNode *User = *Op.getNode()->use_begin();
if (User->getOpcode() != ISD::STORE &&
if ((User->getOpcode() != ISD::STORE ||
(isa<ConstantSDNode>(Op.getOperand(1)) &&
cast<ConstantSDNode>(Op.getOperand(1))->isNullValue())) &&
(User->getOpcode() != ISD::BIT_CONVERT ||
User->getValueType(0) != MVT::i32))
return SDValue();

12
test/CodeGen/X86/extractps.ll
View File

@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=x86 -mcpu=penryn > %t
; RUN: not grep movd %t
; RUN: not grep movss %t
; RUN: grep {extractps \\\$0, %xmm0, } %t
; RUN: grep {movss %xmm} %t | count 1
; RUN: grep {extractps \\\$1, %xmm0, } %t | count 1
; PR2647
external global float, align 16 ; <float*>:0 [#uses=2]
@ -14,6 +14,14 @@ define internal void @""() nounwind {
store float %4, float* @0, align 16
ret void
}
define internal void @""() nounwind {
load float* @0, align 16 ; <float>:1 [#uses=1]
insertelement <4 x float> undef, float %1, i32 1 ; <<4 x float>>:2 [#uses=1]
call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
extractelement <4 x float> %3, i32 1 ; <float>:4 [#uses=1]
store float %4, float* @0, align 16
ret void
}
declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone