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[GlobalISel][AArch64] Add support for widening G_FCEIL

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This adds support for widening G_FCEIL in LegalizerHelper and
AArch64LegalizerInfo. More specifically, it teaches the AArch64 legalizer to
widen G_FCEIL from a 16-bit float to a 32-bit float when the subtarget doesn't
support full FP 16.

This also updates AArch64/f16-instructions.ll to show that we perform the
correct transformation.

llvm-svn: 349927
This commit is contained in:
Jessica Paquette 2018-12-21 17:05:26 +00:00
parent b346fbd25a
commit 481e7777a1
3 changed files with 40 additions and 2 deletions
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9
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
View File

@ -943,6 +943,15 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
Observer.changedInstr(MI);
return Legalized;
case TargetOpcode::G_FCEIL:
if (TypeIdx != 0)
return UnableToLegalize;
Observer.changingInstr(MI);
widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_FPEXT);
widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
Observer.changedInstr(MI);
return Legalized;
}
}

10
lib/Target/AArch64/AArch64LegalizerInfo.cpp
View File

@ -97,9 +97,15 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
getActionDefinitionsBuilder({G_FREM, G_FPOW}).libcallFor({s32, s64});
// TODO: Handle s16.
getActionDefinitionsBuilder(G_FCEIL)
.legalFor({s32, s64, v2s32, v4s32, v2s64});
// If we don't have full FP16 support, then widen s16 to s32 if we
// encounter it.
.widenScalarIf(
[=, &ST](const LegalityQuery &Query) {
return Query.Types[0] == s16 && !ST.hasFullFP16();
},
[=](const LegalityQuery &Query) { return std::make_pair(0, s32); })
.legalFor({s16, s32, s64, v2s32, v4s32, v2s64});
getActionDefinitionsBuilder(G_INSERT)
.unsupportedIf([=](const LegalityQuery &Query) {

23
test/CodeGen/AArch64/f16-instructions.ll
View File

@ -1,6 +1,17 @@
; RUN: llc < %s -mtriple aarch64-unknown-unknown -aarch64-neon-syntax=apple -asm-verbose=false -disable-post-ra -disable-fp-elim | FileCheck %s --check-prefix=CHECK-CVT --check-prefix=CHECK-COMMON
; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fullfp16 -aarch64-neon-syntax=apple -asm-verbose=false -disable-post-ra -disable-fp-elim | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-FP16
; RUN: llc < %s -mtriple aarch64-unknown-unknown -aarch64-neon-syntax=apple \
; RUN: -asm-verbose=false -disable-post-ra -disable-fp-elim -global-isel \
; RUN: -global-isel-abort=2 -pass-remarks-missed=gisel-* 2>&1 | FileCheck %s \
; RUN: --check-prefixes=FALLBACK,GISEL-CVT
; RUN: llc < %s -mtriple aarch64-unknown-unknown -mattr=+fullfp16 \
; RUN: -aarch64-neon-syntax=apple -asm-verbose=false -disable-post-ra \
; RUN: -disable-fp-elim -global-isel -global-isel-abort=2 \
; RUN: -pass-remarks-missed=gisel-* 2>&1 | FileCheck %s \
; RUN: --check-prefixes=FALLBACK-FP16,GISEL-FP16
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; CHECK-CVT-LABEL: test_fadd:
@ -1071,6 +1082,18 @@ define half @test_floor(half %a) #0 {
; CHECK-FP16-NEXT: frintp h0, h0
; CHECK-FP16-NEXT: ret
; FALLBACK-NOT: remark:{{.*}}test_ceil
; FALLBACK-FP16-NOT: remark:{{.*}}test_ceil
; GISEL-CVT-LABEL: test_ceil:
; GISEL-CVT-NEXT: fcvt [[FLOAT32:s[0-9]+]], h0
; GISEL-CVT-NEXT: frintp [[INT32:s[0-9]+]], [[FLOAT32]]
; GISEL-CVT-NEXT: fcvt h0, [[INT32]]
; GISEL-CVT-NEXT: ret
; GISEL-FP16-LABEL: test_ceil:
; GISEL-FP16-NEXT: frintp h0, h0
; GISEL-FP16-NEXT: ret
define half @test_ceil(half %a) #0 {
%r = call half @llvm.ceil.f16(half %a)
ret half %r