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[ARC] Add tablegen definition for the Find Leading Set (FLS) instruction

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Differential Revision: https://reviews.llvm.org/D106602
This commit is contained in:
Thomas Johnson 2021-07-22 16:26:46 -07:00 committed by Mark Schimmel
parent 4e540995b1
commit 4866aceb76
2 changed files with 11 additions and 0 deletions
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5
lib/Target/ARC/ARCInstrInfo.td
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@ -241,6 +241,8 @@ multiclass ArcBinaryEXT5Inst<bits<6> mincode, string opasm> :
multiclass ArcUnaryGEN4Inst<bits<6> mincode, string opasm> : multiclass ArcUnaryGEN4Inst<bits<6> mincode, string opasm> :
ArcUnaryInst<0b00100, mincode, opasm>; ArcUnaryInst<0b00100, mincode, opasm>;
multiclass ArcUnaryEXT5Inst<bits<6> mincode, string opasm> :
ArcUnaryInst<0b00101, mincode, opasm>;
// Pattern generation for different instruction variants. // Pattern generation for different instruction variants.
multiclass MultiPat<SDPatternOperator InFrag, multiclass MultiPat<SDPatternOperator InFrag,
@ -298,6 +300,9 @@ defm : MultiPat<mulhu, MPYMU_rrr, MPYMU_rru6, MPYMU_rrlimm>;
defm SEXB : ArcUnaryGEN4Inst<0b000101, "sexb">; defm SEXB : ArcUnaryGEN4Inst<0b000101, "sexb">;
defm SEXH : ArcUnaryGEN4Inst<0b000110, "sexh">; defm SEXH : ArcUnaryGEN4Inst<0b000110, "sexh">;
// Extension unary instruction definitions.
defm FLS : ArcUnaryEXT5Inst<0b010011, "fls">;
// General Unary Instruction fragments. // General Unary Instruction fragments.
def : Pat<(sext_inreg i32:$a, i8), (SEXB_rr i32:$a)>; def : Pat<(sext_inreg i32:$a, i8), (SEXB_rr i32:$a)>;
def : Pat<(sext_inreg i32:$a, i16), (SEXH_rr i32:$a)>; def : Pat<(sext_inreg i32:$a, i16), (SEXH_rr i32:$a)>;

6
test/MC/Disassembler/ARC/misc.txt
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@ -60,3 +60,9 @@
# CHECK: seteq %fp, %fp, -1 # CHECK: seteq %fp, %fp, -1
0xb8 0x23 0xff 0x3f 0xb8 0x23 0xff 0x3f
# CHECK: fls %r0, %r0
0x2f 0x28 0x13 0x00
# CHECK: fls.f %r0, %r0
0x2f 0x28 0x13 0x80