mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-01-31 20:51:52 +01:00
Fix minor build issue (NFC)
Change [x86] Fix tile register spill issue was causing problems for our build using gcc-5.4.1 The problem was caused by this line: for (const MachineInstr &MI : make_range(MIS.begin(), MI)) where MI was previously defined as a MachineBasicBlock iterator. Differential Revision: https://reviews.llvm.org/D94415
This commit is contained in:
parent
004e4ff79e
commit
4873bb5e0e
@ -1553,12 +1553,12 @@ void HoistSpillHelper::hoistAllSpills() {
|
||||
for (auto const &Insert : SpillsToIns) {
|
||||
MachineBasicBlock *BB = Insert.first;
|
||||
Register LiveReg = Insert.second;
|
||||
MachineBasicBlock::iterator MI = IPA.getLastInsertPointIter(OrigLI, *BB);
|
||||
MachineInstrSpan MIS(MI, BB);
|
||||
TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot,
|
||||
MachineBasicBlock::iterator MII = IPA.getLastInsertPointIter(OrigLI, *BB);
|
||||
MachineInstrSpan MIS(MII, BB);
|
||||
TII.storeRegToStackSlot(*BB, MII, LiveReg, false, Slot,
|
||||
MRI.getRegClass(LiveReg), &TRI);
|
||||
LIS.InsertMachineInstrRangeInMaps(MIS.begin(), MI);
|
||||
for (const MachineInstr &MI : make_range(MIS.begin(), MI))
|
||||
LIS.InsertMachineInstrRangeInMaps(MIS.begin(), MII);
|
||||
for (const MachineInstr &MI : make_range(MIS.begin(), MII))
|
||||
getVDefInterval(MI, LIS);
|
||||
++NumSpills;
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user