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AMDGPU: Fix asserting on 0 dmask for image intrinsics
Fold these to undef during lowering so users get eliminated. llvm-svn: 298387
This commit is contained in:
Matt Arsenault
parent
e1375f5e41
commit
489b4bdeba
@ -2988,6 +2988,64 @@ SDValue SITargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op,
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return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, IntVT, MMO);
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}
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// Basic sample.
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case Intrinsic::amdgcn_image_sample:
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case Intrinsic::amdgcn_image_sample_cl:
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case Intrinsic::amdgcn_image_sample_d:
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case Intrinsic::amdgcn_image_sample_d_cl:
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case Intrinsic::amdgcn_image_sample_l:
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case Intrinsic::amdgcn_image_sample_b:
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case Intrinsic::amdgcn_image_sample_b_cl:
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case Intrinsic::amdgcn_image_sample_lz:
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case Intrinsic::amdgcn_image_sample_cd:
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case Intrinsic::amdgcn_image_sample_cd_cl:
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// Sample with comparison.
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case Intrinsic::amdgcn_image_sample_c:
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case Intrinsic::amdgcn_image_sample_c_cl:
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case Intrinsic::amdgcn_image_sample_c_d:
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case Intrinsic::amdgcn_image_sample_c_d_cl:
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case Intrinsic::amdgcn_image_sample_c_l:
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case Intrinsic::amdgcn_image_sample_c_b:
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case Intrinsic::amdgcn_image_sample_c_b_cl:
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case Intrinsic::amdgcn_image_sample_c_lz:
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case Intrinsic::amdgcn_image_sample_c_cd:
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case Intrinsic::amdgcn_image_sample_c_cd_cl:
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// Sample with offsets.
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case Intrinsic::amdgcn_image_sample_o:
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case Intrinsic::amdgcn_image_sample_cl_o:
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case Intrinsic::amdgcn_image_sample_d_o:
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case Intrinsic::amdgcn_image_sample_d_cl_o:
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case Intrinsic::amdgcn_image_sample_l_o:
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case Intrinsic::amdgcn_image_sample_b_o:
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case Intrinsic::amdgcn_image_sample_b_cl_o:
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case Intrinsic::amdgcn_image_sample_lz_o:
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case Intrinsic::amdgcn_image_sample_cd_o:
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case Intrinsic::amdgcn_image_sample_cd_cl_o:
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// Sample with comparison and offsets.
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case Intrinsic::amdgcn_image_sample_c_o:
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case Intrinsic::amdgcn_image_sample_c_cl_o:
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case Intrinsic::amdgcn_image_sample_c_d_o:
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case Intrinsic::amdgcn_image_sample_c_d_cl_o:
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case Intrinsic::amdgcn_image_sample_c_l_o:
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case Intrinsic::amdgcn_image_sample_c_b_o:
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case Intrinsic::amdgcn_image_sample_c_b_cl_o:
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case Intrinsic::amdgcn_image_sample_c_lz_o:
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case Intrinsic::amdgcn_image_sample_c_cd_o:
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case Intrinsic::amdgcn_image_sample_c_cd_cl_o:
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case Intrinsic::amdgcn_image_getlod: {
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// Replace dmask with everything disabled with undef.
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const ConstantSDNode *DMask = dyn_cast<ConstantSDNode>(Op.getOperand(5));
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if (!DMask || DMask->isNullValue()) {
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SDValue Undef = DAG.getUNDEF(Op.getValueType());
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return DAG.getMergeValues({ Undef, Op.getOperand(0) }, SDLoc(Op));
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}
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return SDValue();
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}
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default:
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return SDValue();
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}
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@ -28,6 +28,16 @@ main_body:
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_getlod_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_getlod_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.getlod.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.f32.v8i32(float, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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declare <4 x float> @llvm.amdgcn.image.getlod.v4f32.v2f32.v8i32(<2 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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@ -285,6 +285,128 @@ main_body:
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_variable_dmask_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_variable_dmask_enabled(float addrspace(1)* %out, i32 %dmask) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 %dmask, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cl_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_cl_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_d_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_d_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.d.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_d_cl_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_d_cl_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_l_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_l_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.l.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_b_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_b_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.b.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_b_cl_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_b_cl_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_lz_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_lz_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.lz.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cd_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_cd_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.cd.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cd_cl_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_cd_cl_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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declare <4 x float> @llvm.amdgcn.image.sample.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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declare <4 x float> @llvm.amdgcn.image.sample.cl.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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declare <4 x float> @llvm.amdgcn.image.sample.d.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
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@ -181,6 +181,225 @@ main_body:
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cl_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_cl_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_d_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_d_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_d_cl_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_d_cl_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_l_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_l_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_b_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_b_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_b_cl_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_b_cl_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_lz_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_lz_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cd_o_none_enabled:
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; GCN-NOT: image
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; GCN-NOT: store
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define void @adjust_writemask_sample_cd_o_none_enabled(float addrspace(1)* %out) {
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main_body:
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%r = call <4 x float> @llvm.amdgcn.image.sample.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
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%elt0 = extractelement <4 x float> %r, i32 0
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store float %elt0, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}adjust_writemask_sample_cd_cl_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_cd_cl_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_cl_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_cl_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_d_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_d_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.d.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_d_cl_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_d_cl_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.d.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_l_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_l_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.l.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_b_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_b_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.b.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_b_cl_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_b_cl_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.b.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_lz_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_lz_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.lz.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_cd_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_cd_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}adjust_writemask_sample_c_cd_cl_o_none_enabled:
|
||||
; GCN-NOT: image
|
||||
; GCN-NOT: store
|
||||
define void @adjust_writemask_sample_c_cd_cl_o_none_enabled(float addrspace(1)* %out) {
|
||||
main_body:
|
||||
%r = call <4 x float> @llvm.amdgcn.image.sample.c.cd.cl.o.v4f32.v4f32.v8i32(<4 x float> undef, <8 x i32> undef, <4 x i32> undef, i32 0, i1 false, i1 false, i1 false, i1 false, i1 false)
|
||||
%elt0 = extractelement <4 x float> %r, i32 0
|
||||
store float %elt0, float addrspace(1)* %out
|
||||
ret void
|
||||
}
|
||||
|
||||
declare <4 x float> @llvm.amdgcn.image.sample.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
|
||||
declare <4 x float> @llvm.amdgcn.image.sample.cl.o.v4f32.v4f32.v8i32(<4 x float>, <8 x i32>, <4 x i32>, i32, i1, i1, i1, i1, i1) #0
|
||||
|
||||
Loading…
Reference in New Issue
Block a user