RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

AMDGPU: Skip promote alloca with no optimizations

Browse Source 
llvm-svn: 259551
This commit is contained in:
Matt Arsenault 2016-02-02 19:32:42 +00:00
parent dc5fdc3a8f
commit 48d83980e8
3 changed files with 40 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
View File

@ -98,7 +98,7 @@ bool AMDGPUPromoteAlloca::doInitialization(Module &M) {
}
bool AMDGPUPromoteAlloca::runOnFunction(Function &F) {
if (!TM)
if (!TM || F.hasFnAttribute(Attribute::OptimizeNone))
return false;
FunctionType *FTy = F.getFunctionType();

2
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
View File

@ -229,7 +229,7 @@ void AMDGPUPassConfig::addIRPasses() {
void AMDGPUPassConfig::addCodeGenPrepare() {
const AMDGPUTargetMachine &TM = getAMDGPUTargetMachine();
const AMDGPUSubtarget &ST = *TM.getSubtargetImpl();
if (ST.isPromoteAllocaEnabled()) {
if (TM.getOptLevel() > CodeGenOpt::None && ST.isPromoteAllocaEnabled()) {
addPass(createAMDGPUPromoteAlloca(&TM));
addPass(createSROAPass());
}

38
test/CodeGen/AMDGPU/promote-alloca-no-opts.ll Normal file
View File

@ -0,0 +1,38 @@
; RUN: llc -O0 -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mattr=+promote-alloca < %s | FileCheck -check-prefix=NOOPTS -check-prefix=ALL %s
; RUN: llc -O1 -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mattr=+promote-alloca < %s | FileCheck -check-prefix=OPTS -check-prefix=ALL %s
; ALL-LABEL: {{^}}promote_alloca_i32_array_array:
; NOOPTS: workgroup_group_segment_byte_size = 0{{$}}
; NOOPTS-NOT ds_write
; OPTS: ds_write
define void @promote_alloca_i32_array_array(i32 addrspace(1)* %out, i32 %index) #0 {
entry:
%alloca = alloca [2 x [2 x i32]]
%gep0 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 0
%gep1 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 1
store i32 0, i32* %gep0
store i32 1, i32* %gep1
%gep2 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 %index
%load = load i32, i32* %gep2
store i32 %load, i32 addrspace(1)* %out
ret void
}
; ALL-LABEL: {{^}}optnone_promote_alloca_i32_array_array:
; ALL: workgroup_group_segment_byte_size = 0{{$}}
; ALL-NOT ds_write
define void @optnone_promote_alloca_i32_array_array(i32 addrspace(1)* %out, i32 %index) #1 {
entry:
%alloca = alloca [2 x [2 x i32]]
%gep0 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 0
%gep1 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 1
store i32 0, i32* %gep0
store i32 1, i32* %gep1
%gep2 = getelementptr inbounds [2 x [2 x i32]], [2 x [2 x i32]]* %alloca, i32 0, i32 0, i32 %index
%load = load i32, i32* %gep2
store i32 %load, i32 addrspace(1)* %out
ret void
}
attributes #0 = { nounwind }
attributes #1 = { nounwind optnone noinline }