mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 02:33:06 +01:00
[X86] Use FIST for i64 atomic stores on 32-bit targets without SSE.
This commit is contained in:
Craig Topper
parent
b70c140e59
commit
48e959027f
@ -27518,14 +27518,14 @@ bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
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return false;
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}
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// TODO: In 32-bit mode, use FISTP when X87 is available?
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bool X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
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Type *MemType = SI->getValueOperand()->getType();
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bool NoImplicitFloatOps =
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SI->getFunction()->hasFnAttribute(Attribute::NoImplicitFloat);
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if (MemType->getPrimitiveSizeInBits() == 64 && !Subtarget.is64Bit() &&
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!Subtarget.useSoftFloat() && !NoImplicitFloatOps && Subtarget.hasSSE1())
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!Subtarget.useSoftFloat() && !NoImplicitFloatOps &&
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(Subtarget.hasSSE1() || Subtarget.hasX87()))
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return false;
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return needsCmpXchgNb(MemType);
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@ -28286,28 +28286,52 @@ static SDValue LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG,
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if (VT == MVT::i64 && !IsTypeLegal) {
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// For illegal i64 atomic_stores, we can try to use MOVQ or MOVLPS if SSE
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// is enabled.
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// FIXME: Use fist with X87.
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bool NoImplicitFloatOps =
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DAG.getMachineFunction().getFunction().hasFnAttribute(
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Attribute::NoImplicitFloat);
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if (!Subtarget.useSoftFloat() && !NoImplicitFloatOps &&
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Subtarget.hasSSE1()) {
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SDValue SclToVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64,
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Node->getOperand(2));
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MVT StVT = Subtarget.hasSSE2() ? MVT::v2i64 : MVT::v4f32;
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SclToVec = DAG.getBitcast(StVT, SclToVec);
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SDVTList Tys = DAG.getVTList(MVT::Other);
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SDValue Ops[] = { Node->getChain(), SclToVec, Node->getBasePtr() };
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SDValue Chain = DAG.getMemIntrinsicNode(X86ISD::VEXTRACT_STORE, dl, Tys,
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Ops, MVT::i64,
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Node->getMemOperand());
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if (!Subtarget.useSoftFloat() && !NoImplicitFloatOps) {
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SDValue Chain;
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if (Subtarget.hasSSE1()) {
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SDValue SclToVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64,
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Node->getOperand(2));
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MVT StVT = Subtarget.hasSSE2() ? MVT::v2i64 : MVT::v4f32;
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SclToVec = DAG.getBitcast(StVT, SclToVec);
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SDVTList Tys = DAG.getVTList(MVT::Other);
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SDValue Ops[] = {Node->getChain(), SclToVec, Node->getBasePtr()};
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Chain = DAG.getMemIntrinsicNode(X86ISD::VEXTRACT_STORE, dl, Tys, Ops,
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MVT::i64, Node->getMemOperand());
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} else if (Subtarget.hasX87()) {
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// First load this into an 80-bit X87 register using a stack temporary.
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// This will put the whole integer into the significand.
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SDValue StackPtr = DAG.CreateStackTemporary(MVT::i64);
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int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
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MachinePointerInfo MPI =
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MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI);
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Chain =
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DAG.getStore(Node->getChain(), dl, Node->getOperand(2), StackPtr,
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MPI, /*Align*/ 0, MachineMemOperand::MOStore);
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SDVTList Tys = DAG.getVTList(MVT::f80, MVT::Other);
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SDValue LdOps[] = {Chain, StackPtr};
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SDValue Value =
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DAG.getMemIntrinsicNode(X86ISD::FILD, dl, Tys, LdOps, MVT::i64, MPI,
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/*Align*/ 0, MachineMemOperand::MOLoad);
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Chain = Value.getValue(1);
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// If this is a sequentially consistent store, also emit an appropriate
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// barrier.
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if (IsSeqCst)
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Chain = emitLockedStackOp(DAG, Subtarget, Chain, dl);
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// Now use an FIST to do the atomic store.
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SDValue StoreOps[] = {Chain, Value, Node->getBasePtr()};
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Chain =
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DAG.getMemIntrinsicNode(X86ISD::FIST, dl, DAG.getVTList(MVT::Other),
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StoreOps, MVT::i64, Node->getMemOperand());
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}
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return Chain;
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if (Chain) {
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// If this is a sequentially consistent store, also emit an appropriate
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// barrier.
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if (IsSeqCst)
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Chain = emitLockedStackOp(DAG, Subtarget, Chain, dl);
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return Chain;
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}
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}
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}
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@ -80,33 +80,25 @@ define void @fadd_64r(double* %loc, double %val) nounwind {
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; X86-NOSSE: # %bb.0:
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: pushl %ebx
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; X86-NOSSE-NEXT: pushl %esi
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; X86-NOSSE-NEXT: andl $-8, %esp
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; X86-NOSSE-NEXT: subl $24, %esp
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; X86-NOSSE-NEXT: movl 8(%ebp), %esi
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; X86-NOSSE-NEXT: fildll (%esi)
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; X86-NOSSE-NEXT: subl $32, %esp
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; X86-NOSSE-NEXT: movl 8(%ebp), %eax
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; X86-NOSSE-NEXT: fildll (%eax)
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; X86-NOSSE-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: faddl 12(%ebp)
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; X86-NOSSE-NEXT: fstpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %ebx
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; X86-NOSSE-NEXT: fstpl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl (%esi), %eax
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; X86-NOSSE-NEXT: movl 4(%esi), %edx
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; X86-NOSSE-NEXT: .p2align 4, 0x90
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; X86-NOSSE-NEXT: .LBB1_1: # %atomicrmw.start
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; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NOSSE-NEXT: lock cmpxchg8b (%esi)
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; X86-NOSSE-NEXT: jne .LBB1_1
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; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
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; X86-NOSSE-NEXT: leal -8(%ebp), %esp
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; X86-NOSSE-NEXT: popl %esi
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; X86-NOSSE-NEXT: popl %ebx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NOSSE-NEXT: movl %ecx, (%esp)
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; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fistpll (%eax)
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; X86-NOSSE-NEXT: movl %ebp, %esp
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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@ -256,7 +248,6 @@ define void @fadd_64g() nounwind {
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; X86-NOSSE: # %bb.0:
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: pushl %ebx
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; X86-NOSSE-NEXT: andl $-8, %esp
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; X86-NOSSE-NEXT: subl $32, %esp
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; X86-NOSSE-NEXT: fildll glob64
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@ -267,19 +258,14 @@ define void @fadd_64g() nounwind {
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; X86-NOSSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fld1
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; X86-NOSSE-NEXT: faddl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fstpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %ebx
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; X86-NOSSE-NEXT: fstpl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl glob64+4, %edx
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; X86-NOSSE-NEXT: movl glob64, %eax
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; X86-NOSSE-NEXT: .p2align 4, 0x90
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; X86-NOSSE-NEXT: .LBB3_1: # %atomicrmw.start
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; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NOSSE-NEXT: lock cmpxchg8b glob64
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; X86-NOSSE-NEXT: jne .LBB3_1
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; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
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; X86-NOSSE-NEXT: leal -4(%ebp), %esp
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; X86-NOSSE-NEXT: popl %ebx
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fistpll glob64
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; X86-NOSSE-NEXT: movl %ebp, %esp
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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@ -426,7 +412,6 @@ define void @fadd_64imm() nounwind {
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; X86-NOSSE: # %bb.0:
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: pushl %ebx
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; X86-NOSSE-NEXT: andl $-8, %esp
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; X86-NOSSE-NEXT: subl $32, %esp
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; X86-NOSSE-NEXT: fildll -559038737
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@ -437,19 +422,14 @@ define void @fadd_64imm() nounwind {
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; X86-NOSSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fld1
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; X86-NOSSE-NEXT: faddl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fstpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %ebx
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; X86-NOSSE-NEXT: fstpl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl -559038737, %eax
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; X86-NOSSE-NEXT: movl -559038733, %edx
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; X86-NOSSE-NEXT: .p2align 4, 0x90
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; X86-NOSSE-NEXT: .LBB5_1: # %atomicrmw.start
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; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NOSSE-NEXT: lock cmpxchg8b -559038737
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; X86-NOSSE-NEXT: jne .LBB5_1
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; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
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; X86-NOSSE-NEXT: leal -4(%ebp), %esp
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; X86-NOSSE-NEXT: popl %ebx
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fistpll -559038737
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; X86-NOSSE-NEXT: movl %ebp, %esp
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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@ -602,10 +582,9 @@ define void @fadd_64stack() nounwind {
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; X86-NOSSE: # %bb.0:
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: pushl %ebx
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; X86-NOSSE-NEXT: andl $-8, %esp
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; X86-NOSSE-NEXT: subl $40, %esp
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fildll {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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@ -614,18 +593,13 @@ define void @fadd_64stack() nounwind {
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; X86-NOSSE-NEXT: fld1
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; X86-NOSSE-NEXT: faddl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fstpl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl (%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NOSSE-NEXT: .p2align 4, 0x90
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; X86-NOSSE-NEXT: .LBB7_1: # %atomicrmw.start
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; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NOSSE-NEXT: lock cmpxchg8b (%esp)
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; X86-NOSSE-NEXT: jne .LBB7_1
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; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
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; X86-NOSSE-NEXT: leal -4(%ebp), %esp
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; X86-NOSSE-NEXT: popl %ebx
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; X86-NOSSE-NEXT: movl %eax, (%esp)
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; X86-NOSSE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl %ebp, %esp
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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@ -709,36 +683,28 @@ define void @fadd_array(i64* %arg, double %arg1, i64 %arg2) nounwind {
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; X86-NOSSE: # %bb.0: # %bb
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; X86-NOSSE-NEXT: pushl %ebp
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; X86-NOSSE-NEXT: movl %esp, %ebp
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; X86-NOSSE-NEXT: pushl %ebx
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; X86-NOSSE-NEXT: pushl %edi
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; X86-NOSSE-NEXT: pushl %esi
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; X86-NOSSE-NEXT: andl $-8, %esp
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; X86-NOSSE-NEXT: subl $32, %esp
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; X86-NOSSE-NEXT: movl 20(%ebp), %esi
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; X86-NOSSE-NEXT: movl 8(%ebp), %edi
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; X86-NOSSE-NEXT: fildll (%edi,%esi,8)
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; X86-NOSSE-NEXT: subl $40, %esp
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; X86-NOSSE-NEXT: movl 20(%ebp), %eax
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; X86-NOSSE-NEXT: movl 8(%ebp), %ecx
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; X86-NOSSE-NEXT: fildll (%ecx,%eax,8)
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; X86-NOSSE-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NOSSE-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: faddl 12(%ebp)
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; X86-NOSSE-NEXT: fstpl (%esp)
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; X86-NOSSE-NEXT: movl (%esp), %ebx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NOSSE-NEXT: movl (%edi,%esi,8), %eax
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; X86-NOSSE-NEXT: movl 4(%edi,%esi,8), %edx
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; X86-NOSSE-NEXT: .p2align 4, 0x90
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; X86-NOSSE-NEXT: .LBB8_1: # %atomicrmw.start
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; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; X86-NOSSE-NEXT: lock cmpxchg8b (%edi,%esi,8)
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; X86-NOSSE-NEXT: jne .LBB8_1
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; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
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; X86-NOSSE-NEXT: leal -12(%ebp), %esp
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; X86-NOSSE-NEXT: fstpl {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NOSSE-NEXT: movl %edx, (%esp)
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; X86-NOSSE-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; X86-NOSSE-NEXT: fildll (%esp)
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; X86-NOSSE-NEXT: fistpll (%ecx,%eax,8)
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; X86-NOSSE-NEXT: leal -4(%ebp), %esp
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; X86-NOSSE-NEXT: popl %esi
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; X86-NOSSE-NEXT: popl %edi
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; X86-NOSSE-NEXT: popl %ebx
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; X86-NOSSE-NEXT: popl %ebp
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; X86-NOSSE-NEXT: retl
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;
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@ -16,27 +16,24 @@ define void @test1(i64* %ptr, i64 %val1) {
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;
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; NOSSE-LABEL: test1:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebx
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: pushl %esi
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; NOSSE-NEXT: .cfi_def_cfa_offset 12
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; NOSSE-NEXT: .cfi_offset %esi, -12
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; NOSSE-NEXT: .cfi_offset %ebx, -8
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
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; NOSSE-NEXT: movl (%esi), %eax
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; NOSSE-NEXT: movl 4(%esi), %edx
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; NOSSE-NEXT: .p2align 4, 0x90
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; NOSSE-NEXT: .LBB0_1: # %atomicrmw.start
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; NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
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; NOSSE-NEXT: lock cmpxchg8b (%esi)
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; NOSSE-NEXT: jne .LBB0_1
|
||||
; NOSSE-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; NOSSE-NEXT: popl %esi
|
||||
; NOSSE-NEXT: .cfi_def_cfa_offset 8
|
||||
; NOSSE-NEXT: popl %ebx
|
||||
; NOSSE-NEXT: .cfi_def_cfa_offset 4
|
||||
; NOSSE-NEXT: .cfi_offset %ebp, -8
|
||||
; NOSSE-NEXT: movl %esp, %ebp
|
||||
; NOSSE-NEXT: .cfi_def_cfa_register %ebp
|
||||
; NOSSE-NEXT: andl $-8, %esp
|
||||
; NOSSE-NEXT: subl $8, %esp
|
||||
; NOSSE-NEXT: movl 8(%ebp), %eax
|
||||
; NOSSE-NEXT: movl 12(%ebp), %ecx
|
||||
; NOSSE-NEXT: movl 16(%ebp), %edx
|
||||
; NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; NOSSE-NEXT: movl %ecx, (%esp)
|
||||
; NOSSE-NEXT: fildll (%esp)
|
||||
; NOSSE-NEXT: fistpll (%eax)
|
||||
; NOSSE-NEXT: lock orl $0, (%esp)
|
||||
; NOSSE-NEXT: movl %ebp, %esp
|
||||
; NOSSE-NEXT: popl %ebp
|
||||
; NOSSE-NEXT: .cfi_def_cfa %esp, 4
|
||||
; NOSSE-NEXT: retl
|
||||
store atomic i64 %val1, i64* %ptr seq_cst, align 8
|
||||
ret void
|
||||
|
||||
@ -84,27 +84,21 @@ define void @store_atomic_imm_64(i64* %p) {
|
||||
;
|
||||
; X32-LABEL: store_atomic_imm_64:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_offset 8
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: .cfi_def_cfa_offset 12
|
||||
; X32-NEXT: .cfi_offset %esi, -12
|
||||
; X32-NEXT: .cfi_offset %ebx, -8
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: xorl %ecx, %ecx
|
||||
; X32-NEXT: movl $42, %ebx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB3_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB3_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: .cfi_def_cfa_offset 8
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: .cfi_def_cfa_offset 4
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: movl $0, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl $42, (%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
; These are implemented with a CAS loop on 32 bit architectures, and thus
|
||||
; cannot be optimized in the same way as the others.
|
||||
@ -123,27 +117,21 @@ define void @store_atomic_imm_64_big(i64* %p) {
|
||||
;
|
||||
; X32-LABEL: store_atomic_imm_64_big:
|
||||
; X32: # %bb.0:
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_offset 8
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: .cfi_def_cfa_offset 12
|
||||
; X32-NEXT: .cfi_offset %esi, -12
|
||||
; X32-NEXT: .cfi_offset %ebx, -8
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: movl $23, %ecx
|
||||
; X32-NEXT: movl $1215752192, %ebx # imm = 0x4876E800
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB4_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB4_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: .cfi_def_cfa_offset 8
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: .cfi_def_cfa_offset 4
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: movl $23, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl $1215752192, (%esp) # imm = 0x4876E800
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
store atomic i64 100000000000, i64* %p monotonic, align 8
|
||||
ret void
|
||||
@ -336,30 +324,20 @@ define void @add_64i(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: addl $2, %ebx
|
||||
; X32-NEXT: adcl $0, %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB14_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB14_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: addl $2, %ecx
|
||||
; X32-NEXT: adcl $0, %edx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -383,30 +361,20 @@ define void @add_64r(i64* %p, i64 %v) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: addl 12(%ebp), %ebx
|
||||
; X32-NEXT: adcl 16(%ebp), %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB15_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB15_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: addl 12(%ebp), %ecx
|
||||
; X32-NEXT: adcl 16(%ebp), %edx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -576,30 +544,20 @@ define void @sub_64r(i64* %p, i64 %v) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: subl 12(%ebp), %ebx
|
||||
; X32-NEXT: sbbl 16(%ebp), %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB23_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB23_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: subl 12(%ebp), %ecx
|
||||
; X32-NEXT: sbbl 16(%ebp), %edx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -751,29 +709,18 @@ define void @and_64i(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: andl $2, %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: xorl %ecx, %ecx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB31_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB31_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: andl $2, %ecx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl $0, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -797,30 +744,20 @@ define void @and_64r(i64* %p, i64 %v) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: andl 16(%ebp), %ecx
|
||||
; X32-NEXT: andl 12(%ebp), %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB32_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB32_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: andl 16(%ebp), %edx
|
||||
; X32-NEXT: andl 12(%ebp), %ecx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -993,29 +930,19 @@ define void @or_64i(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: orl $2, %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB41_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB41_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: orl $2, %ecx
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1039,30 +966,20 @@ define void @or_64r(i64* %p, i64 %v) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: orl 16(%ebp), %ecx
|
||||
; X32-NEXT: orl 12(%ebp), %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB42_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB42_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: orl 16(%ebp), %edx
|
||||
; X32-NEXT: orl 12(%ebp), %ecx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1235,29 +1152,19 @@ define void @xor_64i(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: xorl $2, %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB51_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB51_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: xorl $2, %ecx
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1281,30 +1188,20 @@ define void @xor_64r(i64* %p, i64 %v) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: xorl 16(%ebp), %ecx
|
||||
; X32-NEXT: xorl 12(%ebp), %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB52_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB52_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: xorl 16(%ebp), %edx
|
||||
; X32-NEXT: xorl 12(%ebp), %ecx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1438,30 +1335,20 @@ define void @inc_64(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: addl $1, %ebx
|
||||
; X32-NEXT: adcl $0, %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB58_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB58_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: addl $1, %ecx
|
||||
; X32-NEXT: adcl $0, %edx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1586,30 +1473,20 @@ define void @dec_64(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: addl $-1, %ebx
|
||||
; X32-NEXT: adcl $-1, %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB63_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB63_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: addl $-1, %ecx
|
||||
; X32-NEXT: adcl $-1, %edx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1719,30 +1596,20 @@ define void @not_64(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: movl (%esp), %ebx
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: notl %edx
|
||||
; X32-NEXT: notl %ecx
|
||||
; X32-NEXT: notl %ebx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB68_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB68_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl %ecx, (%esp)
|
||||
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
@ -1844,30 +1711,20 @@ define void @neg_64(i64* %p) {
|
||||
; X32-NEXT: .cfi_offset %ebp, -8
|
||||
; X32-NEXT: movl %esp, %ebp
|
||||
; X32-NEXT: .cfi_def_cfa_register %ebp
|
||||
; X32-NEXT: pushl %ebx
|
||||
; X32-NEXT: pushl %esi
|
||||
; X32-NEXT: andl $-8, %esp
|
||||
; X32-NEXT: subl $8, %esp
|
||||
; X32-NEXT: .cfi_offset %esi, -16
|
||||
; X32-NEXT: .cfi_offset %ebx, -12
|
||||
; X32-NEXT: movl 8(%ebp), %esi
|
||||
; X32-NEXT: fildll (%esi)
|
||||
; X32-NEXT: fistpll (%esp)
|
||||
; X32-NEXT: subl $16, %esp
|
||||
; X32-NEXT: movl 8(%ebp), %eax
|
||||
; X32-NEXT: fildll (%eax)
|
||||
; X32-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: xorl %ecx, %ecx
|
||||
; X32-NEXT: xorl %ebx, %ebx
|
||||
; X32-NEXT: subl (%esp), %ebx
|
||||
; X32-NEXT: xorl %edx, %edx
|
||||
; X32-NEXT: subl {{[0-9]+}}(%esp), %edx
|
||||
; X32-NEXT: sbbl {{[0-9]+}}(%esp), %ecx
|
||||
; X32-NEXT: movl (%esi), %eax
|
||||
; X32-NEXT: movl 4(%esi), %edx
|
||||
; X32-NEXT: .p2align 4, 0x90
|
||||
; X32-NEXT: .LBB73_1: # %atomicrmw.start
|
||||
; X32-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X32-NEXT: lock cmpxchg8b (%esi)
|
||||
; X32-NEXT: jne .LBB73_1
|
||||
; X32-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X32-NEXT: leal -8(%ebp), %esp
|
||||
; X32-NEXT: popl %esi
|
||||
; X32-NEXT: popl %ebx
|
||||
; X32-NEXT: movl %edx, (%esp)
|
||||
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
|
||||
; X32-NEXT: fildll (%esp)
|
||||
; X32-NEXT: fistpll (%eax)
|
||||
; X32-NEXT: movl %ebp, %esp
|
||||
; X32-NEXT: popl %ebp
|
||||
; X32-NEXT: .cfi_def_cfa %esp, 4
|
||||
; X32-NEXT: retl
|
||||
|
||||
@ -77,26 +77,16 @@ define void @store_double(double* %fptr, double %v) {
|
||||
;
|
||||
; X86-NOSSE-LABEL: store_double:
|
||||
; X86-NOSSE: # %bb.0:
|
||||
; X86-NOSSE-NEXT: pushl %ebx
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8
|
||||
; X86-NOSSE-NEXT: pushl %esi
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12
|
||||
; X86-NOSSE-NEXT: .cfi_offset %esi, -12
|
||||
; X86-NOSSE-NEXT: .cfi_offset %ebx, -8
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
||||
; X86-NOSSE-NEXT: subl $12, %esp
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 16
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NOSSE-NEXT: movl (%esi), %eax
|
||||
; X86-NOSSE-NEXT: movl 4(%esi), %edx
|
||||
; X86-NOSSE-NEXT: .p2align 4, 0x90
|
||||
; X86-NOSSE-NEXT: .LBB2_1: # %atomicrmw.start
|
||||
; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X86-NOSSE-NEXT: lock cmpxchg8b (%esi)
|
||||
; X86-NOSSE-NEXT: jne .LBB2_1
|
||||
; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X86-NOSSE-NEXT: popl %esi
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8
|
||||
; X86-NOSSE-NEXT: popl %ebx
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X86-NOSSE-NEXT: movl %ecx, (%esp)
|
||||
; X86-NOSSE-NEXT: fildll (%esp)
|
||||
; X86-NOSSE-NEXT: fistpll (%eax)
|
||||
; X86-NOSSE-NEXT: addl $12, %esp
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4
|
||||
; X86-NOSSE-NEXT: retl
|
||||
;
|
||||
@ -576,26 +566,17 @@ define void @store_double_seq_cst(double* %fptr, double %v) {
|
||||
;
|
||||
; X86-NOSSE-LABEL: store_double_seq_cst:
|
||||
; X86-NOSSE: # %bb.0:
|
||||
; X86-NOSSE-NEXT: pushl %ebx
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8
|
||||
; X86-NOSSE-NEXT: pushl %esi
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 12
|
||||
; X86-NOSSE-NEXT: .cfi_offset %esi, -12
|
||||
; X86-NOSSE-NEXT: .cfi_offset %ebx, -8
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
||||
; X86-NOSSE-NEXT: subl $12, %esp
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 16
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NOSSE-NEXT: movl (%esi), %eax
|
||||
; X86-NOSSE-NEXT: movl 4(%esi), %edx
|
||||
; X86-NOSSE-NEXT: .p2align 4, 0x90
|
||||
; X86-NOSSE-NEXT: .LBB9_1: # %atomicrmw.start
|
||||
; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
|
||||
; X86-NOSSE-NEXT: lock cmpxchg8b (%esi)
|
||||
; X86-NOSSE-NEXT: jne .LBB9_1
|
||||
; X86-NOSSE-NEXT: # %bb.2: # %atomicrmw.end
|
||||
; X86-NOSSE-NEXT: popl %esi
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 8
|
||||
; X86-NOSSE-NEXT: popl %ebx
|
||||
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-NOSSE-NEXT: movl %edx, {{[0-9]+}}(%esp)
|
||||
; X86-NOSSE-NEXT: movl %ecx, (%esp)
|
||||
; X86-NOSSE-NEXT: fildll (%esp)
|
||||
; X86-NOSSE-NEXT: fistpll (%eax)
|
||||
; X86-NOSSE-NEXT: lock orl $0, (%esp)
|
||||
; X86-NOSSE-NEXT: addl $12, %esp
|
||||
; X86-NOSSE-NEXT: .cfi_def_cfa_offset 4
|
||||
; X86-NOSSE-NEXT: retl
|
||||
;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user