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[X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled.
llvm-svn: 362915
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66c40dd3b6
commit
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@ -416,7 +416,7 @@ def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
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(XORPSrr VR128:$src1, VR128:$src2)>;
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}
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let Predicates = [HasAVX] in {
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let Predicates = [HasAVX, NoVLX] in {
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// andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
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def : Pat<(f128 (X86fand VR128:$src1, (loadf128 addr:$src2))),
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(VANDPSrm VR128:$src1, f128mem:$src2)>;
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@ -436,3 +436,24 @@ def : Pat<(f128 (X86fxor VR128:$src1, (loadf128 addr:$src2))),
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def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
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(VXORPSrr VR128:$src1, VR128:$src2)>;
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}
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let Predicates = [HasVLX] in {
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// andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
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def : Pat<(f128 (X86fand VR128X:$src1, (loadf128 addr:$src2))),
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(VANDPSZ128rm VR128X:$src1, f128mem:$src2)>;
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def : Pat<(f128 (X86fand VR128X:$src1, VR128X:$src2)),
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(VANDPSZ128rr VR128X:$src1, VR128X:$src2)>;
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def : Pat<(f128 (X86for VR128X:$src1, (loadf128 addr:$src2))),
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(VORPSZ128rm VR128X:$src1, f128mem:$src2)>;
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def : Pat<(f128 (X86for VR128X:$src1, VR128X:$src2)),
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(VORPSZ128rr VR128X:$src1, VR128X:$src2)>;
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def : Pat<(f128 (X86fxor VR128X:$src1, (loadf128 addr:$src2))),
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(VXORPSZ128rm VR128X:$src1, f128mem:$src2)>;
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def : Pat<(f128 (X86fxor VR128X:$src1, VR128X:$src2)),
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(VXORPSZ128rr VR128X:$src1, VR128X:$src2)>;
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}
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