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[X86] Use EVEX instructions for f128 FAND/FOR/FXOR when avx512vl is enabled.

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llvm-svn: 362915
This commit is contained in:
Craig Topper 2019-06-10 01:18:55 +00:00
parent 66c40dd3b6
commit 4936805386
1 changed files with 22 additions and 1 deletions
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23
lib/Target/X86/X86InstrVecCompiler.td
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@ -416,7 +416,7 @@ def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
(XORPSrr VR128:$src1, VR128:$src2)>; (XORPSrr VR128:$src1, VR128:$src2)>;
} }
let Predicates = [HasAVX] in { let Predicates = [HasAVX, NoVLX] in {
// andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2 // andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
def : Pat<(f128 (X86fand VR128:$src1, (loadf128 addr:$src2))), def : Pat<(f128 (X86fand VR128:$src1, (loadf128 addr:$src2))),
(VANDPSrm VR128:$src1, f128mem:$src2)>; (VANDPSrm VR128:$src1, f128mem:$src2)>;
@ -436,3 +436,24 @@ def : Pat<(f128 (X86fxor VR128:$src1, (loadf128 addr:$src2))),
def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)), def : Pat<(f128 (X86fxor VR128:$src1, VR128:$src2)),
(VXORPSrr VR128:$src1, VR128:$src2)>; (VXORPSrr VR128:$src1, VR128:$src2)>;
} }
let Predicates = [HasVLX] in {
// andps is shorter than andpd or pand. andps is SSE and andpd/pand are in SSE2
def : Pat<(f128 (X86fand VR128X:$src1, (loadf128 addr:$src2))),
(VANDPSZ128rm VR128X:$src1, f128mem:$src2)>;
def : Pat<(f128 (X86fand VR128X:$src1, VR128X:$src2)),
(VANDPSZ128rr VR128X:$src1, VR128X:$src2)>;
def : Pat<(f128 (X86for VR128X:$src1, (loadf128 addr:$src2))),
(VORPSZ128rm VR128X:$src1, f128mem:$src2)>;
def : Pat<(f128 (X86for VR128X:$src1, VR128X:$src2)),
(VORPSZ128rr VR128X:$src1, VR128X:$src2)>;
def : Pat<(f128 (X86fxor VR128X:$src1, (loadf128 addr:$src2))),
(VXORPSZ128rm VR128X:$src1, f128mem:$src2)>;
def : Pat<(f128 (X86fxor VR128X:$src1, VR128X:$src2)),
(VXORPSZ128rr VR128X:$src1, VR128X:$src2)>;
}