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PSHUFW is in SSE, not SSSE3.
llvm-svn: 115691
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@ -1028,14 +1028,14 @@ entry:
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ret i64 %5
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}
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declare x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx, i8) nounwind readnone
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declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8) nounwind readnone
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define i64 @test21(<1 x i64> %a) nounwind readnone optsize ssp {
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; CHECK: pshufw
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entry:
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%0 = bitcast <1 x i64> %a to <4 x i16>
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%1 = bitcast <4 x i16> %0 to x86_mmx
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%2 = tail call x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx %1, i8 3) nounwind readnone
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%2 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %1, i8 3) nounwind readnone
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%3 = bitcast x86_mmx %2 to <4 x i16>
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%4 = bitcast <4 x i16> %3 to <1 x i64>
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%5 = extractelement <1 x i64> %4, i32 0
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