mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 02:52:53 +02:00
Reapply "InstCombine: Reduce trunc (shl x, K) width."
This reapplies r272987 with a fix for infinitely looping when the truncated value is another shift of a constant. llvm-svn: 281379
This commit is contained in:
Matt Arsenault
parent
f87d29dc88
commit
496a335199
@ -532,14 +532,32 @@ Instruction *InstCombiner::visitTrunc(TruncInst &CI) {
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}
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}
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// Transform "trunc (and X, cst)" -> "and (trunc X), cst" so long as the dest
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// type isn't non-native.
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if (Src->hasOneUse() && isa<IntegerType>(SrcTy) &&
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ShouldChangeType(SrcTy, DestTy) &&
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match(Src, m_And(m_Value(A), m_ConstantInt(Cst)))) {
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Value *NewTrunc = Builder->CreateTrunc(A, DestTy, A->getName() + ".tr");
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return BinaryOperator::CreateAnd(NewTrunc,
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ConstantExpr::getTrunc(Cst, DestTy));
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ShouldChangeType(SrcTy, DestTy)) {
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// Transform "trunc (and X, cst)" -> "and (trunc X), cst" so long as the
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// dest type is native.
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if (match(Src, m_And(m_Value(A), m_ConstantInt(Cst)))) {
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Value *NewTrunc = Builder->CreateTrunc(A, DestTy, A->getName() + ".tr");
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return BinaryOperator::CreateAnd(NewTrunc,
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ConstantExpr::getTrunc(Cst, DestTy));
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}
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// Transform "trunc (shl X, cst)" -> "shl (trunc X), cst" so long as the
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// dest type is native and cst < dest size.
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if (match(Src, m_Shl(m_Value(A), m_ConstantInt(Cst))) &&
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!match(A, m_Shr(m_Value(), m_Constant()))) {
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// Skip shifts of shift by constants. It undoes a combine in
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// FoldShiftByConstant and is the extend in reg pattern.
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const unsigned DestSize = DestTy->getScalarSizeInBits();
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if (Cst->getValue().ult(DestSize)) {
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Value *NewTrunc = Builder->CreateTrunc(A, DestTy, A->getName() + ".tr");
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return BinaryOperator::Create(
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Instruction::Shl, NewTrunc,
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ConstantInt::get(DestTy, Cst->getValue().trunc(DestSize)));
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}
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}
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}
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if (Instruction *I = foldVecTruncToExtElt(CI, *this, DL))
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@ -32,7 +32,9 @@ entry:
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; CHECK-NOT: mul i32
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%mul = mul i32 %sub, -4
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; CHECK: sub i32
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; CHECK-NEXT: shl
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; CHECK-NEXT: trunc i32
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; CHECK-NEXT: %conv = shl i16 %{{.*}}, 2
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; CHECK-NEXT: ret i16 %conv
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store i32 %mul, i32* %a, align 4
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%tmp2 = load i32, i32* %a, align 4
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%conv = trunc i32 %tmp2 to i16
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@ -889,9 +889,9 @@ define i1 @test60_addrspacecast_smaller(i8* %foo, i16 %i, i64 %j) {
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define i1 @test60_addrspacecast_larger(i8 addrspace(1)* %foo, i32 %i, i16 %j) {
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; CHECK-LABEL: @test60_addrspacecast_larger(
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; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i32 %i, 2
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[GEP1_IDX]] to i16
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; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], %j
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %i to i16
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; CHECK-NEXT: [[SHL:%.*]] = shl i16 [[TMP1]], 2
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; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[SHL]], %j
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; CHECK-NEXT: ret i1 [[TMP2]]
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;
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%bit = addrspacecast i8 addrspace(1)* %foo to i32 addrspace(2)*
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@ -160,24 +160,245 @@ define i32 @trunc_bitcast3(<4 x i32> %v) {
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; CHECK-NEXT: ret i32 %ext
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}
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; CHECK-LABEL: @trunc_shl_infloop(
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; CHECK: %tmp = lshr i64 %arg, 1
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; CHECK: %tmp21 = shl i64 %tmp, 2
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; CHECK: %tmp2 = trunc i64 %tmp21 to i32
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; CHECK: icmp sgt i32 %tmp2, 0
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define void @trunc_shl_infloop(i64 %arg) {
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bb:
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%tmp = lshr i64 %arg, 1
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%tmp1 = trunc i64 %tmp to i32
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%tmp2 = shl i32 %tmp1, 2
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%tmp3 = icmp sgt i32 %tmp2, 0
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br i1 %tmp3, label %bb2, label %bb1
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bb1:
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%tmp5 = sub i32 0, %tmp1
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%tmp6 = sub i32 %tmp5, 1
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unreachable
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bb2:
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unreachable
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; CHECK-LABEL: @trunc_shl_31_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 31
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define i32 @trunc_shl_31_i32_i64(i64 %val) {
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%shl = shl i64 %val, 31
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_nsw_31_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 31
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define i32 @trunc_shl_nsw_31_i32_i64(i64 %val) {
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%shl = shl nsw i64 %val, 31
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_nuw_31_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 31
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define i32 @trunc_shl_nuw_31_i32_i64(i64 %val) {
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%shl = shl nuw i64 %val, 31
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_nsw_nuw_31_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 31
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define i32 @trunc_shl_nsw_nuw_31_i32_i64(i64 %val) {
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%shl = shl nsw nuw i64 %val, 31
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_15_i16_i64(
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; CHECK: %val.tr = trunc i64 %val to i16
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; CHECK-NEXT: shl i16 %val.tr, 15
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define i16 @trunc_shl_15_i16_i64(i64 %val) {
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%shl = shl i64 %val, 15
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%trunc = trunc i64 %shl to i16
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ret i16 %trunc
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}
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; CHECK-LABEL: @trunc_shl_15_i16_i32(
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; CHECK: %val.tr = trunc i32 %val to i16
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; CHECK-NEXT: shl i16 %val.tr, 15
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define i16 @trunc_shl_15_i16_i32(i32 %val) {
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%shl = shl i32 %val, 15
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%trunc = trunc i32 %shl to i16
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ret i16 %trunc
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}
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; CHECK-LABEL: @trunc_shl_7_i8_i64(
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; CHECK: %val.tr = trunc i64 %val to i8
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; CHECK-NEXT: shl i8 %val.tr, 7
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define i8 @trunc_shl_7_i8_i64(i64 %val) {
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%shl = shl i64 %val, 7
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%trunc = trunc i64 %shl to i8
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ret i8 %trunc
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}
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; CHECK-LABEL: @trunc_shl_1_i2_i64(
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; CHECK: shl i64 %val, 1
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; CHECK-NEXT: trunc i64 %shl to i2
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define i2 @trunc_shl_1_i2_i64(i64 %val) {
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%shl = shl i64 %val, 1
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%trunc = trunc i64 %shl to i2
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ret i2 %trunc
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}
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; CHECK-LABEL: @trunc_shl_1_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 1
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define i32 @trunc_shl_1_i32_i64(i64 %val) {
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%shl = shl i64 %val, 1
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_16_i32_i64(
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; CHECK: %val.tr = trunc i64 %val to i32
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; CHECK-NEXT: shl i32 %val.tr, 16
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define i32 @trunc_shl_16_i32_i64(i64 %val) {
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%shl = shl i64 %val, 16
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_33_i32_i64(
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; CHECK: ret i32 0
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define i32 @trunc_shl_33_i32_i64(i64 %val) {
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%shl = shl i64 %val, 33
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; CHECK-LABEL: @trunc_shl_32_i32_i64(
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; CHECK: ret i32 0
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define i32 @trunc_shl_32_i32_i64(i64 %val) {
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%shl = shl i64 %val, 32
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%trunc = trunc i64 %shl to i32
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ret i32 %trunc
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}
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; TODO: Should be able to handle vectors
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; CHECK-LABEL: @trunc_shl_16_v2i32_v2i64(
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; CHECK: shl <2 x i64>
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define <2 x i32> @trunc_shl_16_v2i32_v2i64(<2 x i64> %val) {
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%shl = shl <2 x i64> %val, <i64 16, i64 16>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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; CHECK-LABEL: @trunc_shl_nosplat_v2i32_v2i64(
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; CHECK: shl <2 x i64>
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define <2 x i32> @trunc_shl_nosplat_v2i32_v2i64(<2 x i64> %val) {
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%shl = shl <2 x i64> %val, <i64 15, i64 16>
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%trunc = trunc <2 x i64> %shl to <2 x i32>
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ret <2 x i32> %trunc
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}
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; CHECK-LABEL: @trunc_shl_31_i32_i64_multi_use(
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; CHECK: shl i64 %val, 31
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; CHECK-NOT: shl i32
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; CHECK: trunc i64 %shl to i32
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; CHECK-NOT: shl i32
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define void @trunc_shl_31_i32_i64_multi_use(i64 %val, i32 addrspace(1)* %ptr0, i64 addrspace(1)* %ptr1) {
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%shl = shl i64 %val, 31
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%trunc = trunc i64 %shl to i32
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store volatile i32 %trunc, i32 addrspace(1)* %ptr0
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store volatile i64 %shl, i64 addrspace(1)* %ptr1
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ret void
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}
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; CHECK-LABEL: @trunc_shl_lshr_infloop(
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; CHECK-NEXT: %tmp0 = lshr i64 %arg, 1
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; CHECK-NEXT: %tmp1 = shl i64 %tmp0, 2
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; CHECK-NEXT: %tmp2 = trunc i64 %tmp1 to i32
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_lshr_infloop(i64 %arg) {
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%tmp0 = lshr i64 %arg, 1
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_ashr_infloop(
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; CHECK-NEXT: %tmp0 = ashr i64 %arg, 3
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; CHECK-NEXT: %tmp1 = shl nsw i64 %tmp0, 2
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; CHECK-NEXT: %tmp2 = trunc i64 %tmp1 to i32
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_ashr_infloop(i64 %arg) {
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%tmp0 = ashr i64 %arg, 3
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_shl_infloop(
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; CHECK-NEXT: %arg.tr = trunc i64 %arg to i32
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; CHECK-NEXT: %tmp2 = shl i32 %arg.tr, 3
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_shl_infloop(i64 %arg) {
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%tmp0 = shl i64 %arg, 1
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_lshr_var(
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; CHECK-NEXT: %tmp0 = lshr i64 %arg, %val
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; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
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; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_lshr_var(i64 %arg, i64 %val) {
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%tmp0 = lshr i64 %arg, %val
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_ashr_var(
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; CHECK-NEXT: %tmp0 = ashr i64 %arg, %val
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; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
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; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_ashr_var(i64 %arg, i64 %val) {
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%tmp0 = ashr i64 %arg, %val
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_shl_var(
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; CHECK-NEXT: %tmp0 = shl i64 %arg, %val
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; CHECK-NEXT: %tmp0.tr = trunc i64 %tmp0 to i32
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; CHECK-NEXT: %tmp2 = shl i32 %tmp0.tr, 2
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; CHECK-NEXT: ret i32 %tmp2
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define i32 @trunc_shl_shl_var(i64 %arg, i64 %val) {
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%tmp0 = shl i64 %arg, %val
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%tmp1 = shl i64 %tmp0, 2
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%tmp2 = trunc i64 %tmp1 to i32
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ret i32 %tmp2
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}
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; CHECK-LABEL: @trunc_shl_v8i15_v8i32_15(
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; CHECK: %shl = shl <8 x i32> %a, <i32 15,
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; CHECK: trunc <8 x i32> %shl to <8 x i16>
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define <8 x i16> @trunc_shl_v8i15_v8i32_15(<8 x i32> %a) {
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%shl = shl <8 x i32> %a, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
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%conv = trunc <8 x i32> %shl to <8 x i16>
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ret <8 x i16> %conv
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}
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; CHECK-LABEL: @trunc_shl_v8i16_v8i32_16(
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; CHECK: %shl = shl <8 x i32> %a, <i32 16
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; CHECK: trunc <8 x i32> %shl to <8 x i16>
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define <8 x i16> @trunc_shl_v8i16_v8i32_16(<8 x i32> %a) {
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%shl = shl <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
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%conv = trunc <8 x i32> %shl to <8 x i16>
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ret <8 x i16> %conv
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}
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; CHECK-LABEL: @trunc_shl_v8i16_v8i32_17(
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; CHECK: %shl = shl <8 x i32> %a, <i32 17
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; CHECK: %conv = trunc <8 x i32> %shl to <8 x i16>
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define <8 x i16> @trunc_shl_v8i16_v8i32_17(<8 x i32> %a) {
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%shl = shl <8 x i32> %a, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>
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%conv = trunc <8 x i32> %shl to <8 x i16>
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ret <8 x i16> %conv
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}
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; CHECK-LABEL: @trunc_shl_v8i16_v8i32_4(
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; CHECK: %shl = shl <8 x i32> %a, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
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; CHECK: trunc <8 x i32> %shl to <8 x i16>
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define <8 x i16> @trunc_shl_v8i16_v8i32_4(<8 x i32> %a) {
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%shl = shl <8 x i32> %a, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
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%conv = trunc <8 x i32> %shl to <8 x i16>
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ret <8 x i16> %conv
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}
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