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[WebAssembly] Mark abs of v2i64 as legal

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We previously had an ISel pattern for i64x2.abs, but because the ISDNode was not
marked legal for v2i64, the instruction was not being selected.

Differential Revision: https://reviews.llvm.org/D101803
This commit is contained in:
Thomas Lively 2021-05-04 13:25:31 -07:00
parent f3aac64c1f
commit 4986a0d7fa
2 changed files with 13 additions and 1 deletions
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2
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
View File

@ -149,7 +149,7 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
setOperationAction(Op, T, Legal);
// Support integer abs
for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32})
for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64})
setOperationAction(ISD::ABS, T, Legal);
// Custom lower BUILD_VECTORs to minimize number of replace_lanes

12
test/CodeGen/WebAssembly/simd-arith.ll
View File

@ -968,6 +968,18 @@ define <2 x i64> @mul_v2i64(<2 x i64> %x, <2 x i64> %y) {
ret <2 x i64> %a
}
; CHECK-LABEL: abs_v2i64:
; NO-SIMD128-NOT: i64x2:
; SIMD128-NEXT: .functype abs_v2i64 (v128) -> (v128){{$}}
; SIMD128-NEXT: i64x2.abs $push[[R:[0-9]+]]=, $0{{$}}
; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @abs_v2i64(<2 x i64> %x) {
%a = sub <2 x i64> zeroinitializer, %x
%b = icmp slt <2 x i64> %x, zeroinitializer
%c = select <2 x i1> %b, <2 x i64> %a, <2 x i64> %x
ret <2 x i64> %c
}
; CHECK-LABEL: neg_v2i64:
; NO-SIMD128-NOT: i64x2
; SIMD128-NEXT: .functype neg_v2i64 (v128) -> (v128){{$}}