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[IndVars] Regenerate test checks (NFC)

This commit is contained in:
Nikita Popov 2020-11-02 22:30:51 +01:00
parent c9829bfb08
commit 49a48518cc

View File

@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -indvars -S %s | FileCheck %s
%struct.A = type { i8 }
@ -6,6 +7,39 @@
@d = global i32 4
define void @_Z3fn1v() {
; CHECK-LABEL: @_Z3fn1v(
; CHECK-NEXT: [[X2:%.*]] = load i32, i32* @d, align 4
; CHECK-NEXT: [[X3:%.*]] = icmp slt i32 [[X2]], 1
; CHECK-NEXT: [[X4:%.*]] = select i1 [[X3]], i32 1, i32 [[X2]]
; CHECK-NEXT: [[X5:%.*]] = load %struct.A*, %struct.A** @c, align 8
; CHECK-NEXT: [[J_SROA_0_0__SROA_IDX:%.*]] = getelementptr [[STRUCT_A:%.*]], %struct.A* [[X5]], i64 0, i32 0
; CHECK-NEXT: [[J_SROA_0_0_COPYLOAD:%.*]] = load i8, i8* [[J_SROA_0_0__SROA_IDX]], align 1
; CHECK-NEXT: br label [[DOTPREHEADER4_LR_PH:%.*]]
; CHECK: .preheader4.lr.ph:
; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 [[X4]], -1
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
; CHECK-NEXT: [[TMP4:%.*]] = sext i8 [[J_SROA_0_0_COPYLOAD]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = mul i64 [[TMP3]], [[TMP4]]
; CHECK-NEXT: br label [[DOTPREHEADER4:%.*]]
; CHECK: .preheader4:
; CHECK-NEXT: [[K_09:%.*]] = phi i8* [ undef, [[DOTPREHEADER4_LR_PH]] ], [ [[X25:%.*]], [[X22:%.*]] ]
; CHECK-NEXT: [[X8:%.*]] = icmp ult i32 0, 4
; CHECK-NEXT: br i1 [[X8]], label [[DOTPREHEADER_LR_PH:%.*]], label [[X22]]
; CHECK: .preheader.lr.ph:
; CHECK-NEXT: br label [[DOTPREHEADER:%.*]]
; CHECK: .preheader:
; CHECK-NEXT: br label [[X17:%.*]]
; CHECK: x17:
; CHECK-NEXT: br i1 false, label [[DOTPREHEADER]], label [[DOT_CRIT_EDGE_8:%.*]]
; CHECK: ._crit_edge.8:
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[K_09]], i64 [[TMP5]]
; CHECK-NEXT: br label [[X22]]
; CHECK: x22:
; CHECK-NEXT: [[K_1_LCSSA:%.*]] = phi i8* [ [[SCEVGEP]], [[DOT_CRIT_EDGE_8]] ], [ [[K_09]], [[DOTPREHEADER4]] ]
; CHECK-NEXT: [[X25]] = getelementptr i8, i8* [[K_1_LCSSA]]
; CHECK-NEXT: br label [[DOTPREHEADER4]]
;
%x2 = load i32, i32* @d
%x3 = icmp slt i32 %x2, 1
%x4 = select i1 %x3, i32 1, i32 %x2
@ -15,7 +49,6 @@ define void @_Z3fn1v() {
br label %.preheader4.lr.ph
.preheader4.lr.ph: ; preds = %0
; CHECK-NOT: add i64 {{.*}}, 4294967296
br label %.preheader4
.preheader4: ; preds = %x22, %.preheader4.lr.ph