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[ModuloSchedule] Do target loop analysis before peeling.

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Simple change to call target hook analyzeLoopForPipelining before
    changing the loop. After peeling analyzing the loop may be more
    complicated for target that don't have a loop instruction. This doesn't
    affect Hexagone and PPC as they have hardware loop instructions.

    Differential Revision: https://reviews.llvm.org/D69912
This commit is contained in:
Thomas Raoux 2019-11-06 11:57:05 -08:00
parent eef75e4354
commit 49a73c0155
2 changed files with 4 additions and 4 deletions
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2
include/llvm/CodeGen/ModuloSchedule.h
View File

@ -342,6 +342,8 @@ private:
MI = CanonicalMIs[MI];
return Schedule.getStage(MI);
}
/// Target loop info before kernel peeling.
std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info;
};
/// Expander that simply annotates each scheduled instruction with a post-instr

6
lib/CodeGen/ModuloSchedule.cpp
View File

@ -1759,10 +1759,6 @@ void PeelingModuloScheduleExpander::rewriteUsesOf(MachineInstr *MI) {
}
void PeelingModuloScheduleExpander::fixupBranches() {
std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> Info =
TII->analyzeLoopForPipelining(BB);
assert(Info);
// Work outwards from the kernel.
bool KernelDisposed = false;
int TC = Schedule.getNumStages() - 1;
@ -1818,6 +1814,8 @@ void PeelingModuloScheduleExpander::expand() {
BB = Schedule.getLoop()->getTopBlock();
Preheader = Schedule.getLoop()->getLoopPreheader();
LLVM_DEBUG(Schedule.dump());
Info = TII->analyzeLoopForPipelining(BB);
assert(Info);
rewriteKernel();
peelPrologAndEpilogs();