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[X86][SSE4A] Add EXTRQ/INSERTQ values to BTVER2 scheduling model

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llvm-svn: 308132
This commit is contained in:
Simon Pilgrim 2017-07-16 12:06:06 +00:00
parent 03051514f2
commit 49eaba61d6
2 changed files with 20 additions and 4 deletions
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16
lib/Target/X86/X86ScheduleBtVer2.td
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@ -370,6 +370,22 @@ def : WriteRes<WriteMicrocoded, [JAny]> { let Latency = 100; }
def : WriteRes<WriteFence, [JSAGU]>;
def : WriteRes<WriteNop, []>;
////////////////////////////////////////////////////////////////////////////////
// SSE4A instructions.
////////////////////////////////////////////////////////////////////////////////
def WriteEXTRQ: SchedWriteRes<[JFPU01]> {
let Latency = 1;
let ResourceCycles = [1];
}
def : InstRW<[WriteEXTRQ], (instregex "EXTRQ")>;
def WriteINSERTQ: SchedWriteRes<[JFPU01]> {
let Latency = 2;
let ResourceCycles = [4];
}
def : InstRW<[WriteINSERTQ], (instregex "INSERTQ")>;
////////////////////////////////////////////////////////////////////////////////
// AVX instructions.
////////////////////////////////////////////////////////////////////////////////

8
test/CodeGen/X86/sse4a-schedule.ll
View File

@ -11,7 +11,7 @@ define <2 x i64> @test_extrq(<2 x i64> %a0, <16 x i8> %a1) {
;
; BTVER2-LABEL: test_extrq:
; BTVER2: # BB#0:
; BTVER2-NEXT: extrq %xmm1, %xmm0
; BTVER2-NEXT: extrq %xmm1, %xmm0 # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
%1 = tail call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %a0, <16 x i8> %a1)
ret <2 x i64> %1
@ -26,7 +26,7 @@ define <2 x i64> @test_extrqi(<2 x i64> %a0) {
;
; BTVER2-LABEL: test_extrqi:
; BTVER2: # BB#0:
; BTVER2-NEXT: extrq $2, $3, %xmm0
; BTVER2-NEXT: extrq $2, $3, %xmm0 # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
%1 = tail call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %a0, i8 3, i8 2)
ret <2 x i64> %1
@ -41,7 +41,7 @@ define <2 x i64> @test_insertq(<2 x i64> %a0, <2 x i64> %a1) {
;
; BTVER2-LABEL: test_insertq:
; BTVER2: # BB#0:
; BTVER2-NEXT: insertq %xmm1, %xmm0
; BTVER2-NEXT: insertq %xmm1, %xmm0 # sched: [2:2.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
%1 = tail call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %a0, <2 x i64> %a1)
ret <2 x i64> %1
@ -56,7 +56,7 @@ define <2 x i64> @test_insertqi(<2 x i64> %a0, <2 x i64> %a1) {
;
; BTVER2-LABEL: test_insertqi:
; BTVER2: # BB#0:
; BTVER2-NEXT: insertq $6, $5, %xmm1, %xmm0
; BTVER2-NEXT: insertq $6, $5, %xmm1, %xmm0 # sched: [2:2.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
%1 = tail call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %a0, <2 x i64> %a1, i8 5, i8 6)
ret <2 x i64> %1