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Code clean up. The peephole pass should be the one updating the instruction
iterator, not TII->OptimizeCompareInstr. llvm-svn: 119186
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db1a4541c2
commit
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@ -602,12 +602,10 @@ public:
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/// OptimizeCompareInstr - See if the comparison instruction can be converted
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/// OptimizeCompareInstr - See if the comparison instruction can be converted
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/// into something more efficient. E.g., on ARM most instructions can set the
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/// into something more efficient. E.g., on ARM most instructions can set the
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/// flags register, obviating the need for a separate CMP. Update the iterator
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/// flags register, obviating the need for a separate CMP.
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/// *only* if a transformation took place.
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virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr,
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virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr,
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unsigned SrcReg, int Mask, int Value,
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unsigned SrcReg, int Mask, int Value,
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const MachineRegisterInfo *MRI,
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const MachineRegisterInfo *MRI) const {
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MachineBasicBlock::iterator &) const {
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return false;
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return false;
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}
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}
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@ -82,8 +82,7 @@ namespace {
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}
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}
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private:
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private:
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bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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bool OptimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
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MachineBasicBlock::iterator &MII);
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bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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bool OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs);
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SmallPtrSet<MachineInstr*, 8> &LocalMIs);
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};
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};
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@ -112,8 +111,6 @@ FunctionPass *llvm::createPeepholeOptimizerPass() {
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bool PeepholeOptimizer::
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bool PeepholeOptimizer::
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OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
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SmallPtrSet<MachineInstr*, 8> &LocalMIs) {
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LocalMIs.insert(MI);
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unsigned SrcReg, DstReg, SubIdx;
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unsigned SrcReg, DstReg, SubIdx;
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if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
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if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
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return false;
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return false;
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@ -242,8 +239,7 @@ OptimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
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/// set) the same flag as the compare, then we can remove the comparison and use
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/// set) the same flag as the compare, then we can remove the comparison and use
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/// the flag from the previous instruction.
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/// the flag from the previous instruction.
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bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
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bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
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MachineBasicBlock *MBB,
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MachineBasicBlock *MBB){
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MachineBasicBlock::iterator &NextIter){
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// If this instruction is a comparison against zero and isn't comparing a
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// If this instruction is a comparison against zero and isn't comparing a
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// physical register, we can try to optimize it.
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// physical register, we can try to optimize it.
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unsigned SrcReg;
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unsigned SrcReg;
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@ -253,7 +249,7 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
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return false;
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return false;
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// Attempt to optimize the comparison instruction.
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// Attempt to optimize the comparison instruction.
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if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI, NextIter)) {
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if (TII->OptimizeCompareInstr(MI, SrcReg, CmpMask, CmpValue, MRI)) {
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++NumEliminated;
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++NumEliminated;
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return true;
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return true;
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}
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}
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@ -262,6 +258,9 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
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}
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}
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bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
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bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
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if (DisablePeephole)
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return false;
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TM = &MF.getTarget();
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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TII = TM->getInstrInfo();
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MRI = &MF.getRegInfo();
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MRI = &MF.getRegInfo();
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@ -276,17 +275,16 @@ bool PeepholeOptimizer::runOnMachineFunction(MachineFunction &MF) {
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for (MachineBasicBlock::iterator
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for (MachineBasicBlock::iterator
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MII = I->begin(), MIE = I->end(); MII != MIE; ) {
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MII = I->begin(), MIE = I->end(); MII != MIE; ) {
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MachineInstr *MI = &*MII;
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MachineInstr *MI = &*MII++;
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LocalMIs.insert(MI);
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if (MI->getDesc().isCompare() &&
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if (MI->getDesc().hasUnmodeledSideEffects())
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!MI->getDesc().hasUnmodeledSideEffects()) {
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continue;
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if (!DisablePeephole && OptimizeCmpInstr(MI, MBB, MII))
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Changed = true;
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if (MI->getDesc().isCompare()) {
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else
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Changed |= OptimizeCmpInstr(MI, MBB);
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++MII;
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} else {
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} else {
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Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);
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Changed |= OptimizeExtInstr(MI, MBB, LocalMIs);
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++MII;
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}
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}
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}
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}
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}
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}
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@ -1484,12 +1484,10 @@ static bool isSuitableForMask(MachineInstr *&MI, unsigned SrcReg,
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}
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}
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/// OptimizeCompareInstr - Convert the instruction supplying the argument to the
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/// OptimizeCompareInstr - Convert the instruction supplying the argument to the
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/// comparison into one that sets the zero bit in the flags register. Update the
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/// comparison into one that sets the zero bit in the flags register.
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/// iterator *only* if a transformation took place.
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bool ARMBaseInstrInfo::
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bool ARMBaseInstrInfo::
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OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
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OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
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int CmpValue, const MachineRegisterInfo *MRI,
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int CmpValue, const MachineRegisterInfo *MRI) const {
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MachineBasicBlock::iterator &MII) const {
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if (CmpValue != 0)
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if (CmpValue != 0)
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return false;
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return false;
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@ -1561,7 +1559,6 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
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MI->RemoveOperand(5);
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MI->RemoveOperand(5);
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MachineInstrBuilder(MI)
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MachineInstrBuilder(MI)
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.addReg(ARM::CPSR, RegState::Define | RegState::Implicit);
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.addReg(ARM::CPSR, RegState::Define | RegState::Implicit);
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MII = llvm::next(MachineBasicBlock::iterator(CmpInstr));
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CmpInstr->eraseFromParent();
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CmpInstr->eraseFromParent();
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return true;
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return true;
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}
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}
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@ -344,8 +344,7 @@ public:
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/// that we can remove a "comparison with zero".
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/// that we can remove a "comparison with zero".
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virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
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virtual bool OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
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int CmpMask, int CmpValue,
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int CmpMask, int CmpValue,
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const MachineRegisterInfo *MRI,
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const MachineRegisterInfo *MRI) const;
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MachineBasicBlock::iterator &MII) const;
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virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
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virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
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const MachineInstr *MI) const;
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const MachineInstr *MI) const;
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