RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
Code Issues Projects Releases Wiki Activity

[X86] Regenerate tbm intrinsics tests. NFCI.

Browse Source 
Merge prefixes where possible, use 'X86' instead of 'X32' (which we try to only use for gnux32 triple tests).
This commit is contained in:
Simon Pilgrim 2020-10-27 15:25:50 +00:00
parent 0bef6245da
commit 4b200d97f1
1 changed files with 69 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

138
test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
View File

@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X32
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/tbm-builtins.c
define i32 @test__bextri_u32(i32 %a0) {
; X32-LABEL: test__bextri_u32:
; X32: # %bb.0:
; X32-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
; X32-NEXT: retl
; X86-LABEL: test__bextri_u32:
; X86: # %bb.0:
; X86-NEXT: bextrl $3841, {{[0-9]+}}(%esp), %eax # imm = 0xF01
; X86-NEXT: retl
;
; X64-LABEL: test__bextri_u32:
; X64: # %bb.0:
@ -19,12 +19,12 @@ define i32 @test__bextri_u32(i32 %a0) {
}
define i32 @test__blcfill_u32(i32 %a0) {
; X32-LABEL: test__blcfill_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcfill_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcfill_u32:
; X64: # %bb.0:
@ -38,13 +38,13 @@ define i32 @test__blcfill_u32(i32 %a0) {
}
define i32 @test__blci_u32(i32 %a0) {
; X32-LABEL: test__blci_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: xorl $-1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blci_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: xorl $-1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blci_u32:
; X64: # %bb.0:
@ -60,14 +60,14 @@ define i32 @test__blci_u32(i32 %a0) {
}
define i32 @test__blcic_u32(i32 %a0) {
; X32-LABEL: test__blcic_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: addl $1, %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcic_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: addl $1, %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcic_u32:
; X64: # %bb.0:
@ -84,12 +84,12 @@ define i32 @test__blcic_u32(i32 %a0) {
}
define i32 @test__blcmsk_u32(i32 %a0) {
; X32-LABEL: test__blcmsk_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: xorl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcmsk_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: xorl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcmsk_u32:
; X64: # %bb.0:
@ -103,12 +103,12 @@ define i32 @test__blcmsk_u32(i32 %a0) {
}
define i32 @test__blcs_u32(i32 %a0) {
; X32-LABEL: test__blcs_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal 1(%ecx), %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blcs_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal 1(%ecx), %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blcs_u32:
; X64: # %bb.0:
@ -122,12 +122,12 @@ define i32 @test__blcs_u32(i32 %a0) {
}
define i32 @test__blsfill_u32(i32 %a0) {
; X32-LABEL: test__blsfill_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: leal -1(%ecx), %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blsfill_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal -1(%ecx), %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blsfill_u32:
; X64: # %bb.0:
@ -141,14 +141,14 @@ define i32 @test__blsfill_u32(i32 %a0) {
}
define i32 @test__blsic_u32(i32 %a0) {
; X32-LABEL: test__blsic_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: subl $1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__blsic_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: subl $1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__blsic_u32:
; X64: # %bb.0:
@ -165,14 +165,14 @@ define i32 @test__blsic_u32(i32 %a0) {
}
define i32 @test__t1mskc_u32(i32 %a0) {
; X32-LABEL: test__t1mskc_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: addl $1, %eax
; X32-NEXT: orl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__t1mskc_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: addl $1, %eax
; X86-NEXT: orl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__t1mskc_u32:
; X64: # %bb.0:
@ -189,14 +189,14 @@ define i32 @test__t1mskc_u32(i32 %a0) {
}
define i32 @test__tzmsk_u32(i32 %a0) {
; X32-LABEL: test__tzmsk_u32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: xorl $-1, %ecx
; X32-NEXT: subl $1, %eax
; X32-NEXT: andl %ecx, %eax
; X32-NEXT: retl
; X86-LABEL: test__tzmsk_u32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: xorl $-1, %ecx
; X86-NEXT: subl $1, %eax
; X86-NEXT: andl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test__tzmsk_u32:
; X64: # %bb.0: