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For now, abort when an ISD::VAARG is encountered on x86-64, rather
than silently generate invalid code. llvm-gcc does not currently use VAArgInst; it lowers va_arg in the front-end. llvm-svn: 50930
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@ -327,12 +327,14 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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// VASTART needs to be custom lowered to use the VarArgsFrameIndex
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setOperationAction(ISD::VASTART , MVT::Other, Custom);
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setOperationAction(ISD::VAARG , MVT::Other, Expand);
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setOperationAction(ISD::VAEND , MVT::Other, Expand);
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if (Subtarget->is64Bit())
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if (Subtarget->is64Bit()) {
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setOperationAction(ISD::VAARG , MVT::Other, Custom);
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setOperationAction(ISD::VACOPY , MVT::Other, Custom);
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else
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} else {
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setOperationAction(ISD::VAARG , MVT::Other, Expand);
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setOperationAction(ISD::VACOPY , MVT::Other, Expand);
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}
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setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
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setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
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@ -4976,6 +4978,17 @@ SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
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return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
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}
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SDOperand X86TargetLowering::LowerVAARG(SDOperand Op, SelectionDAG &DAG) {
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// X86-64 va_list is a struct { i32, i32, i8*, i8* }.
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assert(Subtarget->is64Bit() && "This code only handles 64-bit va_arg!");
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SDOperand Chain = Op.getOperand(0);
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SDOperand SrcPtr = Op.getOperand(1);
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SDOperand SrcSV = Op.getOperand(2);
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assert(0 && "VAArgInst is not yet implemented for x86-64!");
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abort();
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}
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SDOperand X86TargetLowering::LowerVACOPY(SDOperand Op, SelectionDAG &DAG) {
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// X86-64 va_list is a struct { i32, i32, i8*, i8* }.
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assert(Subtarget->is64Bit() && "This code only handles 64-bit va_copy!");
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@ -5598,6 +5611,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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case ISD::RET: return LowerRET(Op, DAG);
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case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG);
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case ISD::VASTART: return LowerVASTART(Op, DAG);
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case ISD::VAARG: return LowerVAARG(Op, DAG);
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case ISD::VACOPY: return LowerVACOPY(Op, DAG);
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case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
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case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG);
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@ -517,6 +517,7 @@ namespace llvm {
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SDOperand LowerDYNAMIC_STACKALLOC(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerVAARG(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerVACOPY(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG);
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