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[ARM] Enable shrink-wrapping by default.
Differential Revision: http://reviews.llvm.org/D14357 rdar://problem/21942589 llvm-svn: 253411
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133cb3aa66
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@ -57,6 +57,11 @@ public:
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void adjustForSegmentedStacks(MachineFunction &MF,
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MachineBasicBlock &MBB) const override;
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/// Returns true if the target will correctly handle shrink wrapping.
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bool enableShrinkWrapping(const MachineFunction &MF) const override {
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return true;
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}
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private:
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void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI, unsigned StmOpc,
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@ -83,9 +83,11 @@ declare void @foo() nounwind
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define void @t7() nounwind {
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entry:
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; CHECKT2D-LABEL: t7:
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; CHECKT2D: blxeq _foo
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; CHECKT2D-NEXT: pop.w
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; CHECKT2D-NEXT: b.w _foo
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; CHECKT2D: it ne
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; CHECKT2D-NEXT: bne.w _foo
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; CHECKT2D-NEXT: push
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; CHECKT2D-NEXT: mov r7, sp
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; CHECKT2D-NEXT: blx _foo
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br i1 undef, label %bb, label %bb1.lr.ph
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bb1.lr.ph:
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@ -1,4 +1,6 @@
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; RUN: llc -mtriple=thumbv7-apple-none-macho < %s | FileCheck %s
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; Disable shrink-wrapping on the first test otherwise we wouldn't
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; exerce the path for PR18136.
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; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false | FileCheck %s
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; RUN: llc -mtriple=thumbv6m-apple-none-macho -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1
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; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS
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; RUN: llc -mtriple=thumbv7--linux-gnueabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-LINUX
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@ -13,10 +13,10 @@ entry:
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define i32 @t1(i32 %a, i32 %b) {
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; A8-LABEL: t1:
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; A8: poplt {r7, pc}
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; A8: bxlt lr
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; SWIFT-LABEL: t1:
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; SWIFT: pop {r7, pc}
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; SWIFT: bxlt lr
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; SWIFT: pop {r7, pc}
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entry:
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%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
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@ -3,7 +3,7 @@
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define void @foo(i32 %X, i32 %Y) {
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entry:
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; CHECK: cmpne
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; CHECK: pophi
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; CHECK: bxhi lr
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%tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
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%tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
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%tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
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@ -5,7 +5,9 @@
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declare void @abort()
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define fastcc void @t(%struct.SString* %word, i8 signext %c) {
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; CHECK: popne
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; CHECK-NOT: pop
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; CHECK: bxne
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; CHECK-NOT: pop
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entry:
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%tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %cond_false
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@ -27,7 +27,7 @@ define void @f2() nounwind ssp {
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entry:
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; CHECK-LABEL: f2:
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; CHECK: cmp
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; CHECK: poplt
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; CHECK: bxlt
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; CHECK-NOT: cmp
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; CHECK: movle
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%0 = load i32, i32* @foo, align 4
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@ -23,7 +23,7 @@ define i32* @bar() {
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; CHECK: .globl baz
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; CHECK-NEXT: .align 2
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; CHECK: adr.w
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; CHECK: tbb
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define i32 @baz() {
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%1 = load i32, i32* @c, align 4
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switch i32 %1, label %7 [
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@ -19,7 +19,8 @@ f:
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define void @f1(i32 %x) optsize {
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; CHECK-LABEL: f1:
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; CHECK: cmp r0, #1
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; CHECK: it eq
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; CHECK: it ne
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; CHECK-NEXT: bxne lr
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%p = icmp eq i32 %x, 1
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br i1 %p, label %t, label %f
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@ -34,7 +35,8 @@ f:
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define void @f2(i32 %x) {
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; CHECK-LABEL: f2:
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; CHECK: cmp r0, #0
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; CHECK: it eq
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; CHECK: it ne
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; CHECK-NEXT: bxne lr
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%p = icmp eq i32 %x, 0
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br i1 %p, label %t, label %f
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@ -72,9 +72,10 @@ entry:
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define void @t3(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: itt ge
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; CHECK: movge r0, r1
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; CHECK: blge {{_?}}foo
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; CHECK: it lt
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; CHECK-NEXT: bxlt lr
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; CHECK: mov r0, r1
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; CHECK: bl {{_?}}foo
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%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
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@ -8,7 +8,7 @@ entry:
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; CHECK: it ne
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; CHECK: cmpne
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; CHECK: it hi
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; CHECK: pophi {r7, pc}
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; CHECK: bxhi lr
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%tmp1 = icmp ult i32 %X, 4 ; <i1> [#uses=1]
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%tmp4 = icmp eq i32 %Y, 0 ; <i1> [#uses=1]
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%tmp7 = or i1 %tmp4, %tmp1 ; <i1> [#uses=1]
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@ -69,7 +69,7 @@ define fastcc void @t1(%struct.SString* %word, i8 signext %c) {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: it ne
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; CHECK: popne {r7, pc}
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; CHECK: bxne lr
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%tmp1 = icmp eq %struct.SString* %word, null ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %cond_false
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@ -9,7 +9,7 @@
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; CHECK-NEXT: b
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; CHECK: [[JUMPTARGET]]:{{.*}}%if.else173
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; CHECK-NEXT: mov.w
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; CHECK-NEXT: pop
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; CHECK-NEXT: bx lr
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; CHECK-NEXT: %if.else145
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; CHECK-NEXT: mov.w
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