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[X86] Rename _RND versions of RANGE/REDUCE/GETMANT/RDNSCALE ISD opcodes to _SAE. Remove SAE operand.
No need to explicitly store it and match it during isel. llvm-svn: 355804
This commit is contained in:
Craig Topper
parent
f7dc7ebfe6
commit
4c2653a717
@ -22083,17 +22083,15 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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assert(Op.getNumOperands() == (6U + HasRounding) &&
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"Unexpected intrinsic form");
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SDValue RoundingMode = Op.getOperand(5);
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unsigned Opc = IntrData->Opc0;
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if (HasRounding) {
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SDValue Sae = Op.getOperand(6);
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if (isRoundModeSAE(Sae))
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return getScalarMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode,
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dl, VT, Src1, Src2,
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RoundingMode, Sae),
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Mask, passThru, Subtarget, DAG);
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if (!isRoundModeCurDirection(Sae))
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Opc = IntrWithRoundingModeOpcode;
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else if (!isRoundModeCurDirection(Sae))
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return SDValue();
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}
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return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1,
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return getScalarMaskingNode(DAG.getNode(Opc, dl, VT, Src1,
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Src2, RoundingMode),
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Mask, passThru, Subtarget, DAG);
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}
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@ -22142,30 +22140,6 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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Rnd),
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Mask, Src0, Subtarget, DAG);
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}
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case INTR_TYPE_2OP_MASK: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue PassThru = Op.getOperand(3);
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SDValue Mask = Op.getOperand(4);
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// We specify 2 possible opcodes for intrinsics with rounding modes.
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// First, we check if the intrinsic may have non-default rounding mode,
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// (IntrData->Opc1 != 0), then we check the rounding mode operand.
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unsigned IntrWithRoundingModeOpcode = IntrData->Opc1;
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if (IntrWithRoundingModeOpcode != 0) {
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SDValue Rnd = Op.getOperand(5);
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if (isRoundModeSAEToX(Rnd))
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return getVectorMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode,
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dl, Op.getValueType(),
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Src1, Src2, Rnd),
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Mask, PassThru, Subtarget, DAG);
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if (!isRoundModeCurDirection(Rnd))
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return SDValue();
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}
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// TODO: Intrinsics should have fast-math-flags to propagate.
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return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT,Src1,Src2),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_2OP_MASK_RM: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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@ -22184,50 +22158,58 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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Src1, Src2, Rnd),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_3OP_SCALAR_MASK: {
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case INTR_TYPE_2OP_MASK_SAE: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue Src3 = Op.getOperand(3);
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SDValue PassThru = Op.getOperand(4);
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SDValue Mask = Op.getOperand(5);
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SDValue PassThru = Op.getOperand(3);
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SDValue Mask = Op.getOperand(4);
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unsigned IntrWithRoundingModeOpcode = IntrData->Opc1;
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if (IntrWithRoundingModeOpcode != 0) {
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SDValue Rnd = Op.getOperand(6);
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if (isRoundModeSAEToX(Rnd))
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return getScalarMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode,
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dl, VT, Src1, Src2, Src3, Rnd),
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Mask, PassThru, Subtarget, DAG);
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if (!isRoundModeCurDirection(Rnd))
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unsigned Opc = IntrData->Opc0;
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if (IntrData->Opc1 != 0) {
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SDValue Sae = Op.getOperand(5);
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if (isRoundModeSAE(Sae))
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Opc = IntrData->Opc1;
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else if (!isRoundModeCurDirection(Sae))
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return SDValue();
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}
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return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1,
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Src2, Src3),
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return getVectorMaskingNode(DAG.getNode(Opc, dl, VT, Src1, Src2),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_3OP_MASK: {
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case INTR_TYPE_3OP_SCALAR_MASK_SAE: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue Src3 = Op.getOperand(3);
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SDValue PassThru = Op.getOperand(4);
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SDValue Mask = Op.getOperand(5);
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SDValue Sae = Op.getOperand(6);
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unsigned Opc;
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if (isRoundModeCurDirection(Sae))
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Opc = IntrData->Opc0;
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else if (isRoundModeSAE(Sae))
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Opc = IntrData->Opc1;
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else
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return SDValue();
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return getScalarMaskingNode(DAG.getNode(Opc, dl, VT, Src1, Src2, Src3),
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Mask, PassThru, Subtarget, DAG);
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}
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case INTR_TYPE_3OP_MASK_SAE: {
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SDValue Src1 = Op.getOperand(1);
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SDValue Src2 = Op.getOperand(2);
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SDValue Src3 = Op.getOperand(3);
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SDValue PassThru = Op.getOperand(4);
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SDValue Mask = Op.getOperand(5);
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// We specify 2 possible opcodes for intrinsics with rounding modes.
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// First, we check if the intrinsic may have non-default rounding mode,
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// (IntrData->Opc1 != 0), then we check the rounding mode operand.
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unsigned IntrWithRoundingModeOpcode = IntrData->Opc1;
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if (IntrWithRoundingModeOpcode != 0) {
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SDValue Rnd = Op.getOperand(6);
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if (isRoundModeSAEToX(Rnd))
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return getVectorMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode,
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dl, Op.getValueType(),
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Src1, Src2, Src3, Rnd),
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Mask, PassThru, Subtarget, DAG);
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if (!isRoundModeCurDirection(Rnd))
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unsigned Opc = IntrData->Opc0;
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if (IntrData->Opc1 != 0) {
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SDValue Sae = Op.getOperand(6);
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if (isRoundModeSAE(Sae))
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Opc = IntrData->Opc1;
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else if (!isRoundModeCurDirection(Sae))
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return SDValue();
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}
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return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT,
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Src1, Src2, Src3),
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return getVectorMaskingNode(DAG.getNode(Opc, dl, VT, Src1, Src2, Src3),
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Mask, PassThru, Subtarget, DAG);
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}
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case BLENDV: {
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@ -27723,9 +27705,9 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case X86ISD::VFIXUPIMMS: return "X86ISD::VFIXUPIMMS";
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case X86ISD::VFIXUPIMMS_SAE: return "X86ISD::VFIXUPIMMS_SAE";
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case X86ISD::VRANGE: return "X86ISD::VRANGE";
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case X86ISD::VRANGE_RND: return "X86ISD::VRANGE_RND";
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case X86ISD::VRANGE_SAE: return "X86ISD::VRANGE_SAE";
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case X86ISD::VRANGES: return "X86ISD::VRANGES";
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case X86ISD::VRANGES_RND: return "X86ISD::VRANGES_RND";
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case X86ISD::VRANGES_SAE: return "X86ISD::VRANGES_SAE";
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case X86ISD::PMULUDQ: return "X86ISD::PMULUDQ";
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case X86ISD::PMULDQ: return "X86ISD::PMULDQ";
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case X86ISD::PSADBW: return "X86ISD::PSADBW";
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@ -27760,17 +27742,17 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
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case X86ISD::VPMADD52H: return "X86ISD::VPMADD52H";
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case X86ISD::VPMADD52L: return "X86ISD::VPMADD52L";
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case X86ISD::VRNDSCALE: return "X86ISD::VRNDSCALE";
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case X86ISD::VRNDSCALE_RND: return "X86ISD::VRNDSCALE_RND";
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case X86ISD::VRNDSCALE_SAE: return "X86ISD::VRNDSCALE_SAE";
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case X86ISD::VRNDSCALES: return "X86ISD::VRNDSCALES";
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case X86ISD::VRNDSCALES_RND: return "X86ISD::VRNDSCALES_RND";
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case X86ISD::VRNDSCALES_SAE: return "X86ISD::VRNDSCALES_SAE";
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case X86ISD::VREDUCE: return "X86ISD::VREDUCE";
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case X86ISD::VREDUCE_RND: return "X86ISD::VREDUCE_RND";
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case X86ISD::VREDUCE_SAE: return "X86ISD::VREDUCE_SAE";
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case X86ISD::VREDUCES: return "X86ISD::VREDUCES";
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case X86ISD::VREDUCES_RND: return "X86ISD::VREDUCES_RND";
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case X86ISD::VREDUCES_SAE: return "X86ISD::VREDUCES_SAE";
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case X86ISD::VGETMANT: return "X86ISD::VGETMANT";
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case X86ISD::VGETMANT_RND: return "X86ISD::VGETMANT_RND";
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case X86ISD::VGETMANT_SAE: return "X86ISD::VGETMANT_SAE";
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case X86ISD::VGETMANTS: return "X86ISD::VGETMANTS";
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case X86ISD::VGETMANTS_RND: return "X86ISD::VGETMANTS_RND";
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case X86ISD::VGETMANTS_SAE: return "X86ISD::VGETMANTS_SAE";
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case X86ISD::PCMPESTR: return "X86ISD::PCMPESTR";
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case X86ISD::PCMPISTR: return "X86ISD::PCMPISTR";
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case X86ISD::XTEST: return "X86ISD::XTEST";
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@ -222,7 +222,7 @@ namespace llvm {
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// FP vector get exponent.
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FGETEXP_RND, FGETEXPS_RND,
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// Extract Normalized Mantissas.
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VGETMANT, VGETMANT_RND, VGETMANTS, VGETMANTS_RND,
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VGETMANT, VGETMANT_SAE, VGETMANTS, VGETMANTS_SAE,
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// FP Scale.
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SCALEF,
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SCALEFS,
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@ -420,13 +420,13 @@ namespace llvm {
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VFIXUPIMM, VFIXUPIMM_SAE,
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VFIXUPIMMS, VFIXUPIMMS_SAE,
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// Range Restriction Calculation For Packed Pairs of Float32/64 values.
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VRANGE, VRANGE_RND, VRANGES, VRANGES_RND,
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VRANGE, VRANGE_SAE, VRANGES, VRANGES_SAE,
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// Reduce - Perform Reduction Transformation on scalar\packed FP.
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VREDUCE, VREDUCE_RND, VREDUCES, VREDUCES_RND,
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VREDUCE, VREDUCE_SAE, VREDUCES, VREDUCES_SAE,
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// RndScale - Round FP Values To Include A Given Number Of Fraction Bits.
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// Also used by the legacy (V)ROUND intrinsics where we mask out the
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// scaling part of the immediate.
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VRNDSCALE, VRNDSCALE_RND, VRNDSCALES, VRNDSCALES_RND,
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VRNDSCALE, VRNDSCALE_SAE, VRNDSCALES, VRNDSCALES_SAE,
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// Tests Types Of a FP Values for packed types.
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VFPCLASS,
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// Tests Types Of a FP Values for scalar types.
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@ -9377,8 +9377,8 @@ multiclass avx512_rndscale_scalar<bits<8> opc, string OpcodeStr,
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defm rb_Int : AVX512_maskable_scalar<opc, MRMSrcReg, _, (outs _.RC:$dst),
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(ins _.RC:$src1, _.RC:$src2, i32u8imm:$src3), OpcodeStr,
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"$src3, {sae}, $src2, $src1", "$src1, $src2, {sae}, $src3",
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(_.VT (X86RndScalesRnd (_.VT _.RC:$src1), (_.VT _.RC:$src2),
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(i32 imm:$src3), (i32 FROUND_NO_EXC)))>, EVEX_B,
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(_.VT (X86RndScalesSAE (_.VT _.RC:$src1), (_.VT _.RC:$src2),
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(i32 imm:$src3)))>, EVEX_B,
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Sched<[sched]>;
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defm m_Int : AVX512_maskable_scalar<opc, MRMSrcMem, _, (outs _.RC:$dst),
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@ -10610,18 +10610,17 @@ multiclass avx512_unary_fp_sae_packed_imm<bits<8> opc, string OpcodeStr,
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OpcodeStr##_.Suffix, "$src2, {sae}, $src1",
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"$src1, {sae}, $src2",
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(OpNode (_.VT _.RC:$src1),
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(i32 imm:$src2),
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(i32 FROUND_NO_EXC))>,
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(i32 imm:$src2))>,
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EVEX_B, Sched<[sched]>;
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}
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multiclass avx512_common_unary_fp_sae_packed_imm<string OpcodeStr,
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AVX512VLVectorVTInfo _, bits<8> opc, SDNode OpNode,
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SDNode OpNodeRnd, X86SchedWriteWidths sched, Predicate prd>{
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SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd>{
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let Predicates = [prd] in {
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defm Z : avx512_unary_fp_packed_imm<opc, OpcodeStr, OpNode, sched.ZMM,
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_.info512>,
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avx512_unary_fp_sae_packed_imm<opc, OpcodeStr, OpNodeRnd,
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avx512_unary_fp_sae_packed_imm<opc, OpcodeStr, OpNodeSAE,
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sched.ZMM, _.info512>, EVEX_V512;
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}
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let Predicates = [prd, HasVLX] in {
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@ -10740,8 +10739,7 @@ multiclass avx512_fp_sae_packed_imm<bits<8> opc, string OpcodeStr,
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"$src1, $src2, {sae}, $src3",
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(OpNode (_.VT _.RC:$src1),
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(_.VT _.RC:$src2),
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(i32 imm:$src3),
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(i32 FROUND_NO_EXC))>,
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(i32 imm:$src3))>,
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EVEX_B, Sched<[sched]>;
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}
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@ -10755,17 +10753,16 @@ multiclass avx512_fp_sae_scalar_imm<bits<8> opc, string OpcodeStr, SDNode OpNode
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"$src1, $src2, {sae}, $src3",
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(OpNode (_.VT _.RC:$src1),
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(_.VT _.RC:$src2),
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(i32 imm:$src3),
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(i32 FROUND_NO_EXC))>,
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(i32 imm:$src3))>,
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EVEX_B, Sched<[sched]>;
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}
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multiclass avx512_common_fp_sae_packed_imm<string OpcodeStr,
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AVX512VLVectorVTInfo _, bits<8> opc, SDNode OpNode,
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SDNode OpNodeRnd, X86SchedWriteWidths sched, Predicate prd>{
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SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd>{
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let Predicates = [prd] in {
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defm Z : avx512_fp_packed_imm<opc, OpcodeStr, OpNode, sched.ZMM, _.info512>,
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avx512_fp_sae_packed_imm<opc, OpcodeStr, OpNodeRnd, sched.ZMM, _.info512>,
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avx512_fp_sae_packed_imm<opc, OpcodeStr, OpNodeSAE, sched.ZMM, _.info512>,
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EVEX_V512;
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}
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@ -10809,62 +10806,62 @@ multiclass avx512_common_3Op_imm8<string OpcodeStr, AVX512VLVectorVTInfo _,
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multiclass avx512_common_fp_sae_scalar_imm<string OpcodeStr,
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X86VectorVTInfo _, bits<8> opc, SDNode OpNode,
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SDNode OpNodeRnd, X86SchedWriteWidths sched, Predicate prd> {
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SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd> {
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let Predicates = [prd] in {
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defm Z : avx512_fp_scalar_imm<opc, OpcodeStr, OpNode, sched.XMM, _>,
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avx512_fp_sae_scalar_imm<opc, OpcodeStr, OpNodeRnd, sched.XMM, _>;
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avx512_fp_sae_scalar_imm<opc, OpcodeStr, OpNodeSAE, sched.XMM, _>;
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}
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}
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multiclass avx512_common_unary_fp_sae_packed_imm_all<string OpcodeStr,
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bits<8> opcPs, bits<8> opcPd, SDNode OpNode,
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SDNode OpNodeRnd, X86SchedWriteWidths sched, Predicate prd>{
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SDNode OpNodeSAE, X86SchedWriteWidths sched, Predicate prd>{
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defm PS : avx512_common_unary_fp_sae_packed_imm<OpcodeStr, avx512vl_f32_info,
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opcPs, OpNode, OpNodeRnd, sched, prd>,
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opcPs, OpNode, OpNodeSAE, sched, prd>,
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EVEX_CD8<32, CD8VF>;
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defm PD : avx512_common_unary_fp_sae_packed_imm<OpcodeStr, avx512vl_f64_info,
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opcPd, OpNode, OpNodeRnd, sched, prd>,
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opcPd, OpNode, OpNodeSAE, sched, prd>,
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EVEX_CD8<64, CD8VF>, VEX_W;
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}
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defm VREDUCE : avx512_common_unary_fp_sae_packed_imm_all<"vreduce", 0x56, 0x56,
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X86VReduce, X86VReduceRnd, SchedWriteFRnd, HasDQI>,
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X86VReduce, X86VReduceSAE, SchedWriteFRnd, HasDQI>,
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AVX512AIi8Base, EVEX;
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defm VRNDSCALE : avx512_common_unary_fp_sae_packed_imm_all<"vrndscale", 0x08, 0x09,
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X86VRndScale, X86VRndScaleRnd, SchedWriteFRnd, HasAVX512>,
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X86VRndScale, X86VRndScaleSAE, SchedWriteFRnd, HasAVX512>,
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AVX512AIi8Base, EVEX;
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defm VGETMANT : avx512_common_unary_fp_sae_packed_imm_all<"vgetmant", 0x26, 0x26,
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X86VGetMant, X86VGetMantRnd, SchedWriteFRnd, HasAVX512>,
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X86VGetMant, X86VGetMantSAE, SchedWriteFRnd, HasAVX512>,
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AVX512AIi8Base, EVEX;
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defm VRANGEPD : avx512_common_fp_sae_packed_imm<"vrangepd", avx512vl_f64_info,
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0x50, X86VRange, X86VRangeRnd,
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0x50, X86VRange, X86VRangeSAE,
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SchedWriteFAdd, HasDQI>,
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AVX512AIi8Base, EVEX_4V, EVEX_CD8<64, CD8VF>, VEX_W;
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defm VRANGEPS : avx512_common_fp_sae_packed_imm<"vrangeps", avx512vl_f32_info,
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0x50, X86VRange, X86VRangeRnd,
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0x50, X86VRange, X86VRangeSAE,
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SchedWriteFAdd, HasDQI>,
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AVX512AIi8Base, EVEX_4V, EVEX_CD8<32, CD8VF>;
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defm VRANGESD: avx512_common_fp_sae_scalar_imm<"vrangesd",
|
||||
f64x_info, 0x51, X86Ranges, X86RangesRnd, SchedWriteFAdd, HasDQI>,
|
||||
f64x_info, 0x51, X86Ranges, X86RangesSAE, SchedWriteFAdd, HasDQI>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<64, CD8VT1>, VEX_W;
|
||||
defm VRANGESS: avx512_common_fp_sae_scalar_imm<"vrangess", f32x_info,
|
||||
0x51, X86Ranges, X86RangesRnd, SchedWriteFAdd, HasDQI>,
|
||||
0x51, X86Ranges, X86RangesSAE, SchedWriteFAdd, HasDQI>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<32, CD8VT1>;
|
||||
|
||||
defm VREDUCESD: avx512_common_fp_sae_scalar_imm<"vreducesd", f64x_info,
|
||||
0x57, X86Reduces, X86ReducesRnd, SchedWriteFRnd, HasDQI>,
|
||||
0x57, X86Reduces, X86ReducesSAE, SchedWriteFRnd, HasDQI>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<64, CD8VT1>, VEX_W;
|
||||
defm VREDUCESS: avx512_common_fp_sae_scalar_imm<"vreducess", f32x_info,
|
||||
0x57, X86Reduces, X86ReducesRnd, SchedWriteFRnd, HasDQI>,
|
||||
0x57, X86Reduces, X86ReducesSAE, SchedWriteFRnd, HasDQI>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<32, CD8VT1>;
|
||||
|
||||
defm VGETMANTSD: avx512_common_fp_sae_scalar_imm<"vgetmantsd", f64x_info,
|
||||
0x27, X86GetMants, X86GetMantsRnd, SchedWriteFRnd, HasAVX512>,
|
||||
0x27, X86GetMants, X86GetMantsSAE, SchedWriteFRnd, HasAVX512>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<64, CD8VT1>, VEX_W;
|
||||
defm VGETMANTSS: avx512_common_fp_sae_scalar_imm<"vgetmantss", f32x_info,
|
||||
0x27, X86GetMants, X86GetMantsRnd, SchedWriteFRnd, HasAVX512>,
|
||||
0x27, X86GetMants, X86GetMantsSAE, SchedWriteFRnd, HasAVX512>,
|
||||
AVX512AIi8Base, VEX_LIG, EVEX_4V, EVEX_CD8<32, CD8VT1>;
|
||||
|
||||
|
||||
|
||||
@ -299,11 +299,6 @@ def SDTFPBinOpImm: SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,
|
||||
SDTCisSameAs<0,1>,
|
||||
SDTCisSameAs<0,2>,
|
||||
SDTCisVT<3, i32>]>;
|
||||
def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisFP<0>, SDTCisVec<0>,
|
||||
SDTCisSameAs<0,1>,
|
||||
SDTCisSameAs<0,2>,
|
||||
SDTCisVT<3, i32>,
|
||||
SDTCisVT<4, i32>]>;
|
||||
def SDTFPTernaryOpImm: SDTypeProfile<1, 4, [SDTCisFP<0>, SDTCisSameAs<0,1>,
|
||||
SDTCisSameAs<0,2>,
|
||||
SDTCisInt<3>,
|
||||
@ -313,10 +308,6 @@ def SDTFPTernaryOpImm: SDTypeProfile<1, 4, [SDTCisFP<0>, SDTCisSameAs<0,1>,
|
||||
def SDTFPUnaryOpImm: SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,
|
||||
SDTCisSameAs<0,1>,
|
||||
SDTCisVT<2, i32>]>;
|
||||
def SDTFPUnaryOpImmRound: SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisVec<0>,
|
||||
SDTCisSameAs<0,1>,
|
||||
SDTCisVT<2, i32>,
|
||||
SDTCisVT<3, i32>]>;
|
||||
|
||||
def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
|
||||
def SDTVBroadcastm : SDTypeProfile<1, 1, [SDTCisVec<0>,
|
||||
@ -425,13 +416,13 @@ def X86VFixupimmSAE : SDNode<"X86ISD::VFIXUPIMM_SAE", SDTFPTernaryOpImm>;
|
||||
def X86VFixupimms : SDNode<"X86ISD::VFIXUPIMMS", SDTFPTernaryOpImm>;
|
||||
def X86VFixupimmSAEs : SDNode<"X86ISD::VFIXUPIMMS_SAE", SDTFPTernaryOpImm>;
|
||||
def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImm>;
|
||||
def X86VRangeRnd : SDNode<"X86ISD::VRANGE_RND", SDTFPBinOpImmRound>;
|
||||
def X86VRangeSAE : SDNode<"X86ISD::VRANGE_SAE", SDTFPBinOpImm>;
|
||||
def X86VReduce : SDNode<"X86ISD::VREDUCE", SDTFPUnaryOpImm>;
|
||||
def X86VReduceRnd : SDNode<"X86ISD::VREDUCE_RND", SDTFPUnaryOpImmRound>;
|
||||
def X86VReduceSAE : SDNode<"X86ISD::VREDUCE_SAE", SDTFPUnaryOpImm>;
|
||||
def X86VRndScale : SDNode<"X86ISD::VRNDSCALE", SDTFPUnaryOpImm>;
|
||||
def X86VRndScaleRnd: SDNode<"X86ISD::VRNDSCALE_RND", SDTFPUnaryOpImmRound>;
|
||||
def X86VRndScaleSAE: SDNode<"X86ISD::VRNDSCALE_SAE", SDTFPUnaryOpImm>;
|
||||
def X86VGetMant : SDNode<"X86ISD::VGETMANT", SDTFPUnaryOpImm>;
|
||||
def X86VGetMantRnd : SDNode<"X86ISD::VGETMANT_RND", SDTFPUnaryOpImmRound>;
|
||||
def X86VGetMantSAE : SDNode<"X86ISD::VGETMANT_SAE", SDTFPUnaryOpImm>;
|
||||
def X86Vfpclass : SDNode<"X86ISD::VFPCLASS",
|
||||
SDTypeProfile<1, 2, [SDTCVecEltisVT<0, i1>,
|
||||
SDTCisFP<1>,
|
||||
@ -524,10 +515,10 @@ def X86Ranges : SDNode<"X86ISD::VRANGES", SDTFPBinOpImm>;
|
||||
def X86RndScales : SDNode<"X86ISD::VRNDSCALES", SDTFPBinOpImm>;
|
||||
def X86Reduces : SDNode<"X86ISD::VREDUCES", SDTFPBinOpImm>;
|
||||
def X86GetMants : SDNode<"X86ISD::VGETMANTS", SDTFPBinOpImm>;
|
||||
def X86RangesRnd : SDNode<"X86ISD::VRANGES_RND", SDTFPBinOpImmRound>;
|
||||
def X86RndScalesRnd : SDNode<"X86ISD::VRNDSCALES_RND", SDTFPBinOpImmRound>;
|
||||
def X86ReducesRnd : SDNode<"X86ISD::VREDUCES_RND", SDTFPBinOpImmRound>;
|
||||
def X86GetMantsRnd : SDNode<"X86ISD::VGETMANTS_RND", SDTFPBinOpImmRound>;
|
||||
def X86RangesSAE : SDNode<"X86ISD::VRANGES_SAE", SDTFPBinOpImm>;
|
||||
def X86RndScalesSAE : SDNode<"X86ISD::VRNDSCALES_SAE", SDTFPBinOpImm>;
|
||||
def X86ReducesSAE : SDNode<"X86ISD::VREDUCES_SAE", SDTFPBinOpImm>;
|
||||
def X86GetMantsSAE : SDNode<"X86ISD::VGETMANTS_SAE", SDTFPBinOpImm>;
|
||||
|
||||
def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,
|
||||
[SDTCisSameAs<0, 1>, SDTCisVec<1>,
|
||||
|
||||
@ -25,13 +25,12 @@ enum IntrinsicType : uint16_t {
|
||||
CMP_MASK_CC,CMP_MASK_SCALAR_CC, VSHIFT, COMI, COMI_RM, BLENDV,
|
||||
CVTPD2PS_MASK,
|
||||
INTR_TYPE_1OP_SAE, INTR_TYPE_2OP_SAE,
|
||||
INTR_TYPE_1OP_MASK_SAE,
|
||||
INTR_TYPE_1OP_MASK_SAE, INTR_TYPE_2OP_MASK_SAE, INTR_TYPE_3OP_MASK_SAE,
|
||||
INTR_TYPE_1OP_MASK, INTR_TYPE_1OP_MASK_RM,
|
||||
INTR_TYPE_2OP_MASK, INTR_TYPE_2OP_MASK_RM,
|
||||
INTR_TYPE_3OP_MASK,
|
||||
INTR_TYPE_2OP_MASK_RM,
|
||||
IFMA_OP, VPERM_2OP, INTR_TYPE_SCALAR_MASK, INTR_TYPE_SCALAR_MASK_SAE,
|
||||
INTR_TYPE_SCALAR_MASK_RND,
|
||||
INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK,
|
||||
INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_SAE,
|
||||
COMPRESS_EXPAND_IN_REG,
|
||||
TRUNCATE_TO_REG, CVTPS2PH_MASK, CVTPD2DQ_MASK, CVTQQ2PS_MASK,
|
||||
TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32,
|
||||
@ -603,22 +602,22 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86ISD::FGETEXPS_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getexp_ss, INTR_TYPE_SCALAR_MASK_RM,
|
||||
X86ISD::FGETEXPS_RND, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_128, INTR_TYPE_2OP_MASK,
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_128, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_256, INTR_TYPE_2OP_MASK,
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_256, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_512, INTR_TYPE_2OP_MASK,
|
||||
X86ISD::VGETMANT, X86ISD::VGETMANT_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_128, INTR_TYPE_2OP_MASK,
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_pd_512, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, X86ISD::VGETMANT_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_128, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_256, INTR_TYPE_2OP_MASK,
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_256, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_512, INTR_TYPE_2OP_MASK,
|
||||
X86ISD::VGETMANT, X86ISD::VGETMANT_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_sd, INTR_TYPE_3OP_SCALAR_MASK,
|
||||
X86ISD::VGETMANTS, X86ISD::VGETMANTS_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ss, INTR_TYPE_3OP_SCALAR_MASK,
|
||||
X86ISD::VGETMANTS, X86ISD::VGETMANTS_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ps_512, INTR_TYPE_2OP_MASK_SAE,
|
||||
X86ISD::VGETMANT, X86ISD::VGETMANT_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_sd, INTR_TYPE_3OP_SCALAR_MASK_SAE,
|
||||
X86ISD::VGETMANTS, X86ISD::VGETMANTS_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_getmant_ss, INTR_TYPE_3OP_SCALAR_MASK_SAE,
|
||||
X86ISD::VGETMANTS, X86ISD::VGETMANTS_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_max_sd_round, INTR_TYPE_SCALAR_MASK_SAE,
|
||||
X86ISD::FMAXS, X86ISD::FMAXS_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_max_ss_round, INTR_TYPE_SCALAR_MASK_SAE,
|
||||
@ -731,32 +730,32 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
|
||||
X86ISD::VTRUNCUS, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_pmovus_wb_512, INTR_TYPE_1OP_MASK,
|
||||
X86ISD::VTRUNCUS, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_128, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_256, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_512, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, X86ISD::VRANGE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_128, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_256, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_512, INTR_TYPE_3OP_MASK, X86ISD::VRANGE, X86ISD::VRANGE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_sd, INTR_TYPE_SCALAR_MASK, X86ISD::VRANGES, X86ISD::VRANGES_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ss, INTR_TYPE_SCALAR_MASK, X86ISD::VRANGES, X86ISD::VRANGES_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_128, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_256, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_512, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, X86ISD::VREDUCE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_128, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_256, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_512, INTR_TYPE_2OP_MASK, X86ISD::VREDUCE, X86ISD::VREDUCE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_sd, INTR_TYPE_SCALAR_MASK, X86ISD::VREDUCES, X86ISD::VREDUCES_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ss, INTR_TYPE_SCALAR_MASK, X86ISD::VREDUCES, X86ISD::VREDUCES_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_128, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_256, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_512, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, X86ISD::VRNDSCALE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_128, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_256, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_512, INTR_TYPE_2OP_MASK, X86ISD::VRNDSCALE, X86ISD::VRNDSCALE_RND),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_128, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_256, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_pd_512, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, X86ISD::VRANGE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_128, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_256, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ps_512, INTR_TYPE_3OP_MASK_SAE, X86ISD::VRANGE, X86ISD::VRANGE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_sd, INTR_TYPE_SCALAR_MASK, X86ISD::VRANGES, X86ISD::VRANGES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_range_ss, INTR_TYPE_SCALAR_MASK, X86ISD::VRANGES, X86ISD::VRANGES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_128, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_256, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_pd_512, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, X86ISD::VREDUCE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_128, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_256, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ps_512, INTR_TYPE_2OP_MASK_SAE, X86ISD::VREDUCE, X86ISD::VREDUCE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_sd, INTR_TYPE_SCALAR_MASK, X86ISD::VREDUCES, X86ISD::VREDUCES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_reduce_ss, INTR_TYPE_SCALAR_MASK, X86ISD::VREDUCES, X86ISD::VREDUCES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_128, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_256, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_pd_512, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, X86ISD::VRNDSCALE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_128, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_256, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ps_512, INTR_TYPE_2OP_MASK_SAE, X86ISD::VRNDSCALE, X86ISD::VRNDSCALE_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_sd, INTR_TYPE_SCALAR_MASK,
|
||||
X86ISD::VRNDSCALES, X86ISD::VRNDSCALES_RND),
|
||||
X86ISD::VRNDSCALES, X86ISD::VRNDSCALES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_rndscale_ss, INTR_TYPE_SCALAR_MASK,
|
||||
X86ISD::VRNDSCALES, X86ISD::VRNDSCALES_RND),
|
||||
X86ISD::VRNDSCALES, X86ISD::VRNDSCALES_SAE),
|
||||
X86_INTRINSIC_DATA(avx512_mask_scalef_pd_128, INTR_TYPE_2OP_MASK_RM,
|
||||
X86ISD::SCALEF, 0),
|
||||
X86_INTRINSIC_DATA(avx512_mask_scalef_pd_256, INTR_TYPE_2OP_MASK_RM,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user