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[CodeGen] Avoid handling DBG_VALUE in the LivePhysRegs (addUses,removeDefs,stepForward)
Summary: This patch prevents DBG_VALUE instructions from influencing LivePhysRegs::stepBackwards and stepForwards. In at least one case, specifically branch folding, the stepBackwards logic was having an influence on code generation. The result was that certain code compiled with '-g -O2' would differ from that compiled with '-O2' alone. It seems that the original logic, accounting for DBG_VALUE, was influencing the placement of an IMPLICIT_DEF which had a later impact on how blocks were processed in branch folding. Reviewers: kparzysz, MatzeB Reviewed By: kparzysz Subscribers: bjope, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D43850 llvm-svn: 327862
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@ -44,7 +44,7 @@ void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
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void LivePhysRegs::removeDefs(const MachineInstr &MI) {
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void LivePhysRegs::removeDefs(const MachineInstr &MI) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (O->isReg()) {
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if (!O->isDef())
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if (!O->isDef() || O->isDebug())
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continue;
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continue;
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unsigned Reg = O->getReg();
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unsigned Reg = O->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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@ -58,7 +58,7 @@ void LivePhysRegs::removeDefs(const MachineInstr &MI) {
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/// Add uses to the set.
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/// Add uses to the set.
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void LivePhysRegs::addUses(const MachineInstr &MI) {
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void LivePhysRegs::addUses(const MachineInstr &MI) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (!O->isReg() || !O->readsReg())
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if (!O->isReg() || !O->readsReg() || O->isDebug())
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continue;
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continue;
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unsigned Reg = O->getReg();
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unsigned Reg = O->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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@ -85,7 +85,7 @@ void LivePhysRegs::stepForward(const MachineInstr &MI,
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SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
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SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
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// Remove killed registers from the set.
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// Remove killed registers from the set.
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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if (O->isReg()) {
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if (O->isReg() && !O->isDebug()) {
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unsigned Reg = O->getReg();
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unsigned Reg = O->getReg();
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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continue;
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continue;
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213
test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
Normal file
213
test/CodeGen/X86/dbg-changes-codegen-branch-folding2.mir
Normal file
@ -0,0 +1,213 @@
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# RUN: llc -run-pass=block-placement %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @_Z3fn1v() !dbg !6 {
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entry:
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%d = alloca i8, align 1
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br i1 1, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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br i1 1, label %for.cond.cleanup, label %for.body.1
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for.body.1:
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br i1 1, label %for.cond.cleanup, label %for.body.2
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for.body.2:
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br i1 1, label %for.cond.cleanup, label %for.body.3
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for.body.3:
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br i1 1, label %for.cond.cleanup, label %for.body.4
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for.body.4:
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br i1 1, label %for.cond.cleanup, label %for.body.5
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for.body.5:
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br i1 1, label %for.cond.cleanup, label %for.body.6
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for.body.6:
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br i1 1, label %for.cond.cleanup, label %for.body.7
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for.body.7:
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br i1 1, label %for.cond.cleanup, label %for.body.8
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for.body.8:
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br i1 1, label %for.cond.cleanup, label %for.body.9
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for.body.9:
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br i1 1, label %for.cond.cleanup, label %for.body.10
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for.body.10:
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br i1 1, label %for.cond.cleanup, label %for.body.11
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for.body.11:
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%d.0.d.0..12 = load volatile i8, i8* %d, align 1
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call void @llvm.dbg.value(metadata i8 %d.0.d.0..12, metadata !16, metadata !DIExpression()), !dbg !19
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br label %for.cond.cleanup
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}
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declare void @llvm.dbg.value(metadata, metadata, metadata)
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 7.0.0 (trunk 326606)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !2)
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!1 = !DIFile(filename: "repro.cpp", directory: "/home/mdavis/bugs/bz-189869")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = distinct !DISubprogram(name: "fn1", linkageName: "_Z3fn1v", scope: !7, file: !7, line: 4, type: !8, isLocal: false, isDefinition: true, scopeLine: 4, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !15)
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!7 = !DIFile(filename: "./repro.cpp", directory: "/home/mdavis/bugs/bz-189869")
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!8 = !DISubroutineType(types: !9)
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!9 = !{}
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!15 = !{!16}
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!16 = !DILocalVariable(name: "d", scope: !6, file: !7, line: 6, type: !17)
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!17 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !18)
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!18 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
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!19 = !DILocation(line: 6, column: 17, scope: !6)
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...
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---
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# CHECK: name: _Z3fn1v
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# CHECK: bb.10.for.body.9
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# CHECK: renamable $al
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# CHECK-NEXT: TEST8rr killed renamable $al
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# CHECK-NEXT: JNE_1
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# CHECK-NOT: $al = IMPLICIT_DEF
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# CHECK: bb.12.for.body.10
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name: _Z3fn1v
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alignment: 4
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tracksRegLiveness: true
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constants:
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body: |
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bb.0.entry:
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successors: %bb.1, %bb.4
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liveins: $rdi, $rbp, $r15, $r14, $r13, $r12, $rbx
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renamable $al = MOV8ri 1
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TEST8rr renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.4, implicit killed $eflags
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bb.1.for.cond.cleanup:
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successors: %bb.3, %bb.2
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liveins: $ecx, $rdi
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renamable $eax = MOV32rm $rsp, 1, $noreg, -16, $noreg
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CMP32rm killed renamable $eax, $rip, 1, $noreg, $noreg, $noreg, implicit-def $eflags
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JBE_1 %bb.3, implicit $eflags
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bb.2:
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successors: %bb.3
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liveins: $ebp, $ebx, $edx, $esi, $rdi, $r8d, $r9d, $r10d, $r11d, $r12d, $r13d, $r14d, $r15d
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bb.3.for.cond.cleanup:
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liveins: $rdi, $xmm3, $xmm4, $xmm5, $xmm6, $xmm7, $xmm9, $xmm13, $xmm14
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RETQ
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bb.4.for.body:
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successors: %bb.1, %bb.5
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liveins: $al, $rdi
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renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.1, implicit $eflags
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bb.5.for.body.1:
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successors: %bb.1, %bb.6
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liveins: $ecx, $rdi
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renamable $al = MOV8ri 1
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.1, implicit $eflags
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bb.6.for.body.2:
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successors: %bb.1, %bb.7
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liveins: $ecx, $eflags, $rdi
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JNE_1 %bb.1, implicit $eflags
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bb.7.for.body.3:
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successors: %bb.1, %bb.8
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liveins: $ecx, $rdi
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renamable $al = MOV8ri 1
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.1, implicit $eflags
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bb.8.for.body.4:
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successors: %bb.1, %bb.9
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liveins: $ecx, $eflags, $rdi
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JNE_1 %bb.1, implicit $eflags
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bb.9.for.body.5:
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successors: %bb.1, %bb.10
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liveins: $ecx, $rdi
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renamable $al = MOV8ri 1
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.1, implicit $eflags
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bb.10.for.body.6:
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successors: %bb.1, %bb.11
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liveins: $ecx, $eflags, $rdi
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JNE_1 %bb.1, implicit $eflags
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bb.11.for.body.7:
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successors: %bb.1, %bb.12
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liveins: $ecx, $rdi
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renamable $al = MOV8ri 1
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JNE_1 %bb.1, implicit $eflags
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bb.12.for.body.8:
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successors: %bb.1, %bb.13
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liveins: $ecx, $eflags, $rdi
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JNE_1 %bb.1, implicit $eflags
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bb.13.for.body.9:
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successors: %bb.14, %bb.15
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liveins: $rdi
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renamable $al = MOV8ri 1
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TEST8rr killed renamable $al, renamable $al, implicit-def $eflags
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JE_1 %bb.15, implicit $eflags
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bb.14:
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successors: %bb.1
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liveins: $rdi
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renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
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JMP_1 %bb.1
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bb.15.for.body.10:
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successors: %bb.16, %bb.17
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liveins: $eflags, $rdi
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JE_1 %bb.17, implicit killed $eflags
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bb.16:
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successors: %bb.1
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liveins: $rdi
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JMP_1 %bb.1
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bb.17.for.body.11:
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successors: %bb.1
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liveins: $rdi
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dead renamable $al = MOV8rm $rsp, 1, $noreg, -121, $noreg
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DBG_VALUE debug-use $al, debug-use $noreg, !16, !DIExpression(), debug-location !19
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renamable $ecx = XOR32rr undef $ecx, undef $ecx, implicit-def dead $eflags
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JMP_1 %bb.1
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...
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