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Evan implemented this.
llvm-svn: 47827
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@ -154,29 +154,6 @@ more than one use. Itanium will want this too.
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===-------------------------------------------------------------------------===
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Compile this:
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int %f1(int %a, int %b) {
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%tmp.1 = and int %a, 15 ; <int> [#uses=1]
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%tmp.3 = and int %b, 240 ; <int> [#uses=1]
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%tmp.4 = or int %tmp.3, %tmp.1 ; <int> [#uses=1]
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ret int %tmp.4
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}
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without a copy. We make this currently:
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_f1:
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rlwinm r2, r4, 0, 24, 27
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rlwimi r2, r3, 0, 28, 31
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or r3, r2, r2
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blr
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The two-addr pass or RA needs to learn when it is profitable to commute an
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instruction to avoid a copy AFTER the 2-addr instruction. The 2-addr pass
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currently only commutes to avoid inserting a copy BEFORE the two addr instr.
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===-------------------------------------------------------------------------===
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Compile offsets from allocas:
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int *%test() {
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@ -24,3 +24,11 @@ define void @test2(i32* %A, i32* %B, i32* %D, i32* %E) {
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store i32 %B.upgrd.4, i32* %E
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ret void
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}
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define i32 @test3(i32 %a, i32 %b) {
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%tmp.1 = and i32 %a, 15 ; <i32> [#uses=1]
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%tmp.3 = and i32 %b, 240 ; <i32> [#uses=1]
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%tmp.4 = or i32 %tmp.3, %tmp.1 ; <i32> [#uses=1]
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ret i32 %tmp.4
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}
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