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[SelectionDAG] make getMemBasePlusOffset() accessible; NFCI
I reinvented this functionality in http://reviews.llvm.org/D16828 because it was hidden away as a static function. The changes in x86 are not based on a complete audit. I suspect there are other possible uses there, and there are almost certainly more potential users in other targets. llvm-svn: 260295
This commit is contained in:
Sanjay Patel
parent
f2a7a6879a
commit
4c9e344480
@ -874,6 +874,9 @@ public:
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SDValue getIndexedStore(SDValue OrigStoe, SDLoc dl, SDValue Base,
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SDValue Offset, ISD::MemIndexedMode AM);
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/// Returns sum of the base pointer and offset.
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SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc DL);
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SDValue getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr,
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SDValue Mask, SDValue Src0, EVT MemVT,
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MachineMemOperand *MMO, ISD::LoadExtType);
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@ -4152,13 +4152,10 @@ static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
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return SDValue(nullptr, 0);
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}
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/// getMemBasePlusOffset - Returns base and offset node for the
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///
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static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
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SelectionDAG &DAG) {
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SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, unsigned Offset,
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SDLoc DL) {
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EVT VT = Base.getValueType();
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return DAG.getNode(ISD::ADD, dl,
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VT, Base, DAG.getConstant(Offset, dl, VT));
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return getNode(ISD::ADD, DL, VT, Base, getConstant(Offset, DL, VT));
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}
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/// isMemSrcFromString - Returns true if memcpy source is a string constant.
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@ -4380,7 +4377,7 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
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Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
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if (Value.getNode())
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Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, dl, DAG),
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DAG.getMemBasePlusOffset(Dst, DstOff, dl),
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DstPtrInfo.getWithOffset(DstOff), isVol,
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false, Align);
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}
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@ -4394,11 +4391,11 @@ static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
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EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
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assert(NVT.bitsGE(VT));
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Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
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getMemBasePlusOffset(Src, SrcOff, dl, DAG),
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DAG.getMemBasePlusOffset(Src, SrcOff, dl),
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SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
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false, MinAlign(SrcAlign, SrcOff));
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Store = DAG.getTruncStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, dl, DAG),
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DAG.getMemBasePlusOffset(Dst, DstOff, dl),
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DstPtrInfo.getWithOffset(DstOff), VT, isVol,
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false, Align);
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}
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@ -4465,7 +4462,7 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
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SDValue Value;
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Value = DAG.getLoad(VT, dl, Chain,
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getMemBasePlusOffset(Src, SrcOff, dl, DAG),
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DAG.getMemBasePlusOffset(Src, SrcOff, dl),
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SrcPtrInfo.getWithOffset(SrcOff), isVol,
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false, false, SrcAlign);
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LoadValues.push_back(Value);
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@ -4480,7 +4477,7 @@ static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
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SDValue Store;
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Store = DAG.getStore(Chain, dl, LoadValues[i],
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getMemBasePlusOffset(Dst, DstOff, dl, DAG),
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DAG.getMemBasePlusOffset(Dst, DstOff, dl),
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DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
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OutChains.push_back(Store);
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DstOff += VTSize;
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@ -4578,7 +4575,7 @@ static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
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}
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assert(Value.getValueType() == VT && "Value with wrong type.");
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SDValue Store = DAG.getStore(Chain, dl, Value,
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getMemBasePlusOffset(Dst, DstOff, dl, DAG),
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DAG.getMemBasePlusOffset(Dst, DstOff, dl),
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DstPtrInfo.getWithOffset(DstOff),
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isVol, false, Align);
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OutChains.push_back(Store);
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@ -8422,12 +8422,9 @@ static SDValue lowerVectorShuffleAsBroadcast(SDLoc DL, MVT VT, SDValue V,
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// then we can reduce the vector load to the broadcasted scalar load.
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LoadSDNode *Ld = cast<LoadSDNode>(BC);
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SDValue BaseAddr = Ld->getOperand(1);
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EVT AddrVT = BaseAddr.getValueType();
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EVT SVT = BroadcastVT.getScalarType();
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unsigned Offset = BroadcastIdx * SVT.getStoreSize();
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SDValue NewAddr = DAG.getNode(
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ISD::ADD, DL, AddrVT, BaseAddr,
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DAG.getConstant(Offset, DL, AddrVT));
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SDValue NewAddr = DAG.getMemBasePlusOffset(BaseAddr, Offset, DL);
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V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr,
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DAG.getMachineFunction().getMachineMemOperand(
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Ld->getMemOperand(), Offset, SVT.getStoreSize()));
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@ -13328,8 +13325,7 @@ SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
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// Make a 64-bit buffer, and use it to build an FILD.
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SDValue StackSlot = DAG.CreateStackTemporary(MVT::i64);
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if (SrcVT == MVT::i32) {
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SDValue WordOff = DAG.getConstant(4, dl, PtrVT);
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SDValue OffsetSlot = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, WordOff);
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SDValue OffsetSlot = DAG.getMemBasePlusOffset(StackSlot, 4, dl);
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SDValue Store1 = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0),
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StackSlot, MachinePointerInfo(),
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false, false, 0);
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@ -13551,8 +13547,7 @@ X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
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SDValue Low32 = DAG.getLoad(MVT::i32, DL, FIST, StackSlot,
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MachinePointerInfo(),
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false, false, false, 0);
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SDValue HighAddr = DAG.getNode(ISD::ADD, DL, PtrVT, StackSlot,
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DAG.getConstant(4, DL, PtrVT));
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SDValue HighAddr = DAG.getMemBasePlusOffset(StackSlot, 4, DL);
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SDValue High32 = DAG.getLoad(MVT::i32, DL, FIST, HighAddr,
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MachinePointerInfo(),
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@ -16302,7 +16297,7 @@ SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
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MemOps.push_back(Store);
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// Store fp_offset
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FIN = DAG.getNode(ISD::ADD, DL, PtrVT, FIN, DAG.getIntPtrConstant(4, DL));
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FIN = DAG.getMemBasePlusOffset(FIN, 4, DL);
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Store = DAG.getStore(Op.getOperand(0), DL,
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DAG.getConstant(FuncInfo->getVarArgsFPOffset(), DL,
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MVT::i32),
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@ -26697,8 +26692,6 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG,
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return SDValue();
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SDValue Ptr = Ld->getBasePtr();
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SDValue Increment =
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DAG.getConstant(16, dl, TLI.getPointerTy(DAG.getDataLayout()));
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EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(),
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NumElems/2);
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@ -26706,7 +26699,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG,
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Ld->getPointerInfo(), Ld->isVolatile(),
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Ld->isNonTemporal(), Ld->isInvariant(),
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Alignment);
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
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Ptr = DAG.getMemBasePlusOffset(Ptr, 16, dl);
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SDValue Load2 = DAG.getLoad(HalfVT, dl, Ld->getChain(), Ptr,
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Ld->getPointerInfo(), Ld->isVolatile(),
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Ld->isNonTemporal(), Ld->isInvariant(),
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@ -26862,18 +26856,14 @@ static SDValue reduceMaskedStoreToScalarStore(MaskedStoreSDNode *MS,
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MS->getValue(), ExtractIndex);
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// Store that element at the appropriate offset from the base pointer.
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SDValue StoreAddr = MS->getBasePtr();
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unsigned EltSize = EltVT.getStoreSize();
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SDValue Addr = MS->getBasePtr();
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if (TrueMaskElt != 0) {
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unsigned StoreOffset = TrueMaskElt * EltSize;
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SDValue StoreOffsetVal = DAG.getIntPtrConstant(StoreOffset, DL);
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StoreAddr = DAG.getNode(ISD::ADD, DL, StoreAddr.getValueType(), StoreAddr,
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StoreOffsetVal);
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unsigned Offset = TrueMaskElt * EltVT.getStoreSize();
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Addr = DAG.getMemBasePlusOffset(Addr, Offset, DL);
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}
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unsigned Alignment = MinAlign(MS->getAlignment(), EltSize);
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return DAG.getStore(MS->getChain(), DL, Extract, StoreAddr,
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MS->getPointerInfo(), MS->isVolatile(),
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MS->isNonTemporal(), Alignment);
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unsigned Alignment = MinAlign(MS->getAlignment(), EltVT.getStoreSize());
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return DAG.getStore(MS->getChain(), DL, Extract, Addr, MS->getPointerInfo(),
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MS->isVolatile(), MS->isNonTemporal(), Alignment);
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}
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static SDValue PerformMSTORECombine(SDNode *N, SelectionDAG &DAG,
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@ -26981,7 +26971,8 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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unsigned Alignment = St->getAlignment();
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if (VT.is256BitVector() && StVT == VT &&
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TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VT,
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AddressSpace, Alignment, &Fast) && !Fast) {
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AddressSpace, Alignment, &Fast) &&
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!Fast) {
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unsigned NumElems = VT.getVectorNumElements();
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if (NumElems < 2)
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return SDValue();
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@ -26989,10 +26980,8 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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SDValue Value0 = Extract128BitVector(StoredVal, 0, DAG, dl);
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SDValue Value1 = Extract128BitVector(StoredVal, NumElems/2, DAG, dl);
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SDValue Stride =
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DAG.getConstant(16, dl, TLI.getPointerTy(DAG.getDataLayout()));
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SDValue Ptr0 = St->getBasePtr();
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SDValue Ptr1 = DAG.getNode(ISD::ADD, dl, Ptr0.getValueType(), Ptr0, Stride);
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SDValue Ptr1 = DAG.getMemBasePlusOffset(Ptr0, 16, dl);
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SDValue Ch0 = DAG.getStore(St->getChain(), dl, Value0, Ptr0,
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St->getPointerInfo(), St->isVolatile(),
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@ -27080,8 +27069,6 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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assert(StoreVecVT.getSizeInBits() == VT.getSizeInBits());
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SDValue ShuffWide = DAG.getBitcast(StoreVecVT, Shuff);
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SmallVector<SDValue, 8> Chains;
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SDValue Increment = DAG.getConstant(StoreType.getSizeInBits() / 8, dl,
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TLI.getPointerTy(DAG.getDataLayout()));
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SDValue Ptr = St->getBasePtr();
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// Perform one or more big stores into memory.
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@ -27092,7 +27079,7 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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SDValue Ch = DAG.getStore(St->getChain(), dl, SubVec, Ptr,
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St->getPointerInfo(), St->isVolatile(),
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St->isNonTemporal(), St->getAlignment());
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
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Ptr = DAG.getMemBasePlusOffset(Ptr, StoreType.getStoreSize(), dl);
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Chains.push_back(Ch);
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}
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@ -27171,8 +27158,7 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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// Otherwise, lower to two pairs of 32-bit loads / stores.
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SDValue LoAddr = Ld->getBasePtr();
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SDValue HiAddr = DAG.getNode(ISD::ADD, LdDL, MVT::i32, LoAddr,
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DAG.getConstant(4, LdDL, MVT::i32));
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SDValue HiAddr = DAG.getMemBasePlusOffset(LoAddr, 4, LdDL);
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SDValue LoLd = DAG.getLoad(MVT::i32, LdDL, Ld->getChain(), LoAddr,
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Ld->getPointerInfo(),
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@ -27192,8 +27178,7 @@ static SDValue PerformSTORECombine(SDNode *N, SelectionDAG &DAG,
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}
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LoAddr = St->getBasePtr();
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HiAddr = DAG.getNode(ISD::ADD, StDL, MVT::i32, LoAddr,
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DAG.getConstant(4, StDL, MVT::i32));
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HiAddr = DAG.getMemBasePlusOffset(LoAddr, 4, StDL);
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SDValue LoSt = DAG.getStore(NewChain, StDL, LoLd, LoAddr,
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St->getPointerInfo(),
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