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[x86] Merge checks for a recently added test case that is the same on
all SSE variants and AVX variants. llvm-svn: 229770
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@ -1304,39 +1304,16 @@ define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
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}
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define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
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; SSE2-LABEL: shuffle_v4i32_40u1:
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; SSE2: # BB#0:
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; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSE2-NEXT: movdqa %xmm1, %xmm0
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; SSE2-NEXT: retq
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; SSE-LABEL: shuffle_v4i32_40u1:
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; SSE: # BB#0:
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; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSE-NEXT: movdqa %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; SSE3-LABEL: shuffle_v4i32_40u1:
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; SSE3: # BB#0:
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; SSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSE3-NEXT: movdqa %xmm1, %xmm0
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; SSE3-NEXT: retq
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;
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; SSSE3-LABEL: shuffle_v4i32_40u1:
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; SSSE3: # BB#0:
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; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSSE3-NEXT: movdqa %xmm1, %xmm0
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: shuffle_v4i32_40u1:
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; SSE41: # BB#0:
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; SSE41-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSE41-NEXT: movdqa %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; AVX1-LABEL: shuffle_v4i32_40u1:
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; AVX1: # BB#0:
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; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: shuffle_v4i32_40u1:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; AVX2-NEXT: retq
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; AVX-LABEL: shuffle_v4i32_40u1:
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; AVX: # BB#0:
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; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
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ret <4 x i32> %shuffle
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}
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