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https://github.com/RPCS3/llvm-mirror.git
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Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_negdi2_s.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include -I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include -DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o libgcc/x86_64/_lshrdi3_s.o ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:unknown:Undefined local symbol LBB21_11 {standard input}:unknown:Undefined local symbol LBB21_12 {standard input}:unknown:Undefined local symbol LBB21_13 {standard input}:unknown:Undefined local symbol LBB21_8 llvm-svn: 55928
This commit is contained in:
Bill Wendling
parent
fc78ac5bbe
commit
4cc4caab72
@ -255,8 +255,8 @@ def int_eh_selector_i64 : Intrinsic<[llvm_i64_ty, llvm_ptr_ty, llvm_ptr_ty,
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def int_eh_typeid_for_i32 : Intrinsic<[llvm_i32_ty, llvm_ptr_ty]>;
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def int_eh_typeid_for_i64 : Intrinsic<[llvm_i64_ty, llvm_ptr_ty]>;
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def int_eh_return_i32 : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>;
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def int_eh_return_i64 : Intrinsic<[llvm_void_ty, llvm_i64_ty, llvm_ptr_ty]>;
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def int_eh_return : Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_ptr_ty]>,
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GCCBuiltin<"__builtin_eh_return">;
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def int_eh_unwind_init: Intrinsic<[llvm_void_ty]>,
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GCCBuiltin<"__builtin_unwind_init">;
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@ -68,6 +68,15 @@ namespace FileModel {
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};
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}
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// Stack canary model types.
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namespace StackCanaries {
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enum Model {
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Default,
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On,
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Always
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};
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}
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//===----------------------------------------------------------------------===//
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///
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/// TargetMachine - Primary interface to the complete machine description for
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@ -3130,9 +3130,10 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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return 0;
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}
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case Intrinsic::eh_return_i32:
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case Intrinsic::eh_return_i64:
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if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
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case Intrinsic::eh_return: {
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MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
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if (MMI) {
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MMI->setCallsEHReturn(true);
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DAG.setRoot(DAG.getNode(ISD::EH_RETURN,
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MVT::Other,
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@ -3144,12 +3145,15 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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}
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return 0;
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case Intrinsic::eh_unwind_init:
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}
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case Intrinsic::eh_unwind_init: {
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if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo()) {
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MMI->setCallsUnwindInit(true);
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}
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return 0;
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}
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case Intrinsic::eh_dwarf_cfa: {
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MVT VT = getValue(I.getOperand(1)).getValueType();
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@ -40,6 +40,7 @@ namespace llvm {
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bool RealignStack;
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bool VerboseAsm;
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bool DisableJumpTables;
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StackCanaries::Model StackProtectors;
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}
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static cl::opt<bool, true> PrintCode("print-machineinstrs",
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@ -163,6 +164,21 @@ DisableSwitchTables(cl::Hidden, "disable-jump-tables",
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cl::location(DisableJumpTables),
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cl::init(false));
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static cl::opt<llvm::StackCanaries::Model, true>
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GenerateStackProtectors("stack-protector",
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cl::desc("Generate stack protectors"),
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cl::location(StackProtectors),
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cl::init(StackCanaries::Default),
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cl::values(
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clEnumValN(StackCanaries::Default, "default",
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" No stack protectors"),
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clEnumValN(StackCanaries::On, "on",
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" Generate stack protectors for functions that"
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"need them"),
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clEnumValN(StackCanaries::Always, "all",
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" Generate stack protectors for all functions"),
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clEnumValEnd));
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//---------------------------------------------------------------------------
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// TargetMachine Class
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//
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@ -316,6 +316,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
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setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand);
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setOperationAction(ISD::EHSELECTION, MVT::i32, Expand);
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if (Subtarget->is64Bit()) {
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// FIXME: Verify
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setExceptionPointerRegister(X86::RAX);
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setExceptionSelectorRegister(X86::RDX);
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} else {
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@ -5595,7 +5596,7 @@ SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
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SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
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return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI,
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DAG.getIntPtrConstant(Subtarget->is64Bit() ? 8 : 4));
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DAG.getIntPtrConstant(!Subtarget->is64Bit() ? 4 : 8));
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}
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SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
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@ -5605,26 +5606,26 @@ SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
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SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
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{
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assert(!Subtarget->is64Bit() &&
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"Lowering of eh_return builtin is not supported yet on x86-64");
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MachineFunction &MF = DAG.getMachineFunction();
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SDValue Chain = Op.getOperand(0);
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SDValue Offset = Op.getOperand(1);
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SDValue Handler = Op.getOperand(2);
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SDValue Frame = DAG.getRegister(Subtarget->is64Bit() ? X86::RBP : X86::EBP,
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SDValue Frame = DAG.getRegister(RegInfo->getFrameRegister(MF),
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getPointerTy());
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unsigned StoreAddrReg = (Subtarget->is64Bit() ? X86::RCX : X86::ECX);
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SDValue StoreAddr = DAG.getNode(ISD::SUB, getPointerTy(), Frame,
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DAG.getIntPtrConstant(Subtarget->is64Bit() ?
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-8UL: -4UL));
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DAG.getIntPtrConstant(-4UL));
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StoreAddr = DAG.getNode(ISD::ADD, getPointerTy(), StoreAddr, Offset);
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Chain = DAG.getStore(Chain, Handler, StoreAddr, NULL, 0);
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Chain = DAG.getCopyToReg(Chain, StoreAddrReg, StoreAddr);
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MF.getRegInfo().addLiveOut(StoreAddrReg);
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Chain = DAG.getCopyToReg(Chain, X86::ECX, StoreAddr);
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MF.getRegInfo().addLiveOut(X86::ECX);
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return DAG.getNode(X86ISD::EH_RETURN,
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MVT::Other,
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Chain, DAG.getRegister(StoreAddrReg, getPointerTy()));
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return DAG.getNode(X86ISD::EH_RETURN, MVT::Other,
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Chain, DAG.getRegister(X86::ECX, getPointerTy()));
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}
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SDValue X86TargetLowering::LowerTRAMPOLINE(SDValue Op,
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@ -129,17 +129,6 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
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[(brind (loadi64 addr:$dst))]>;
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}
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//===----------------------------------------------------------------------===//
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// EH Pseudo Instructions
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//
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let isTerminator = 1, isReturn = 1, isBarrier = 1,
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hasCtrlDep = 1 in {
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def EH_RETURN64 : I<0xC3, RawFrm, (outs), (ins GR64:$addr),
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"ret\t#eh_return, addr: $addr",
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[(X86ehret GR64:$addr)]>;
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}
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//===----------------------------------------------------------------------===//
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// Miscellaneous Instructions...
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//
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@ -159,14 +159,6 @@ X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
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const unsigned *
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X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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bool callsEHReturn = false;
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if (MF) {
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
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callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
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}
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static const unsigned CalleeSavedRegs32Bit[] = {
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X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0
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};
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@ -179,11 +171,6 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
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};
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static const unsigned CalleeSavedRegs64EHRet[] = {
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X86::RAX, X86::RDX, X86::RBX, X86::R12,
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X86::R13, X86::R14, X86::R15, X86::RBP, 0
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};
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static const unsigned CalleeSavedRegsWin64[] = {
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X86::RBX, X86::RBP, X86::RDI, X86::RSI,
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X86::R12, X86::R13, X86::R14, X86::R15, 0
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@ -193,22 +180,20 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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if (IsWin64)
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return CalleeSavedRegsWin64;
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else
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return (callsEHReturn ? CalleeSavedRegs64EHRet : CalleeSavedRegs64Bit);
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return CalleeSavedRegs64Bit;
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} else {
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return (callsEHReturn ? CalleeSavedRegs32EHRet : CalleeSavedRegs32Bit);
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if (MF) {
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
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if (MMI && MMI->callsEHReturn())
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return CalleeSavedRegs32EHRet;
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}
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return CalleeSavedRegs32Bit;
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}
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}
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const TargetRegisterClass* const*
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X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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bool callsEHReturn = false;
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if (MF) {
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
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callsEHReturn = (MMI ? MMI->callsEHReturn() : false);
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}
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static const TargetRegisterClass * const CalleeSavedRegClasses32Bit[] = {
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&X86::GR32RegClass, &X86::GR32RegClass,
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&X86::GR32RegClass, &X86::GR32RegClass, 0
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@ -223,12 +208,6 @@ X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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&X86::GR64RegClass, &X86::GR64RegClass,
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&X86::GR64RegClass, &X86::GR64RegClass, 0
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};
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static const TargetRegisterClass * const CalleeSavedRegClasses64EHRet[] = {
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&X86::GR64RegClass, &X86::GR64RegClass,
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&X86::GR64RegClass, &X86::GR64RegClass,
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&X86::GR64RegClass, &X86::GR64RegClass,
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&X86::GR64RegClass, &X86::GR64RegClass, 0
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};
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static const TargetRegisterClass * const CalleeSavedRegClassesWin64[] = {
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&X86::GR64RegClass, &X86::GR64RegClass,
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&X86::GR64RegClass, &X86::GR64RegClass,
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@ -240,12 +219,17 @@ X86RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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if (IsWin64)
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return CalleeSavedRegClassesWin64;
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else
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return (callsEHReturn ?
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CalleeSavedRegClasses64EHRet : CalleeSavedRegClasses64Bit);
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return CalleeSavedRegClasses64Bit;
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} else {
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return (callsEHReturn ?
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CalleeSavedRegClasses32EHRet : CalleeSavedRegClasses32Bit);
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if (MF) {
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const MachineFrameInfo *MFI = MF->getFrameInfo();
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const MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
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if (MMI && MMI->callsEHReturn())
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return CalleeSavedRegClasses32EHRet;
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}
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return CalleeSavedRegClasses32Bit;
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}
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}
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BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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@ -803,7 +787,6 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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case X86::TCRETURNri64:
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case X86::TCRETURNdi64:
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case X86::EH_RETURN:
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case X86::EH_RETURN64:
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case X86::TAILJMPd:
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case X86::TAILJMPr:
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case X86::TAILJMPm: break; // These are ok
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@ -877,13 +860,12 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
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}
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// We're returning from function via eh_return.
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if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
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if (RetOpcode == X86::EH_RETURN) {
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MBBI = prior(MBB.end());
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MachineOperand &DestAddr = MBBI->getOperand(0);
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assert(DestAddr.isRegister() && "Offset should be in register!");
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BuildMI(MBB, MBBI,
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TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
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StackPtr).addReg(DestAddr.getReg());
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BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
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addReg(DestAddr.getReg());
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// Tail call return: adjust the stack pointer and jump to callee
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} else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||
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RetOpcode== X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64) {
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@ -230,6 +230,7 @@ X86DarwinTargetAsmInfo::PreferredEHDataFormat(DwarfEncoding::Target Reason,
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X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
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X86TargetAsmInfo(TM), ELFTargetAsmInfo(TM) {
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bool is64Bit = ETM->getSubtarget<X86Subtarget>().is64Bit();
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ReadOnlySection = ".rodata";
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FourByteConstantSection = "\t.section\t.rodata.cst4,\"aM\",@progbits,4";
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@ -260,6 +261,7 @@ X86ELFTargetAsmInfo::X86ELFTargetAsmInfo(const X86TargetMachine &TM):
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DwarfMacInfoSection = "\t.section\t.debug_macinfo,\"\",@progbits";
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// Exceptions handling
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if (!is64Bit)
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SupportsExceptionHandling = true;
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AbsoluteEHSectionOffsets = false;
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DwarfEHFrameSection = "\t.section\t.eh_frame,\"aw\",@progbits";
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@ -1,17 +0,0 @@
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; Check that eh_return & unwind_init were properly lowered
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; RUN: llvm-as < %s | llc | grep %ebp | count 9
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; RUN: llvm-as < %s | llc | grep %ecx | count 5
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "i386-pc-linux"
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define i8* @test(i32 %a, i8* %b) {
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entry:
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call void @llvm.eh.unwind.init()
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%foo = alloca i32
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call void @llvm.eh.return.i32(i32 %a, i8* %b)
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unreachable
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}
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declare void @llvm.eh.return.i32(i32, i8*)
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declare void @llvm.eh.unwind.init()
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@ -1,17 +0,0 @@
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; Check that eh_return & unwind_init were properly lowered
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; RUN: llvm-as < %s | llc | grep %rbp | count 7
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; RUN: llvm-as < %s | llc | grep %rcx | count 3
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
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target triple = "x86_64-unknown-linux-gnu"
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define i8* @test(i64 %a, i8* %b) {
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entry:
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call void @llvm.eh.unwind.init()
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%foo = alloca i32
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call void @llvm.eh.return.i64(i64 %a, i8* %b)
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unreachable
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}
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declare void @llvm.eh.return.i64(i64, i8*)
|
||||
declare void @llvm.eh.unwind.init()
|
||||
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