From 4d78ad44fbca2b96075bc98283036061e39ca422 Mon Sep 17 00:00:00 2001
From: Tomas Matheson <tomas.matheson@arm.com>
Date: Tue, 3 Aug 2021 16:15:21 +0100
Subject: [PATCH] [ARM][atomicrmw] Fix CMP_SWAP_32 expand assert

This assert is intended to ensure that the high registers are not
selected when it is passed to one of the thumb UXT instructions. However
it was triggering even for 32 bit where no UXT instruction is emitted.

Fixes PR51313.

Differential Revision: https://reviews.llvm.org/D107363

(cherry picked from commit 40650f27b5df95b2f96d25ea03976d8136804441)
---
 lib/Target/ARM/ARMExpandPseudoInsts.cpp |  2 +-
 test/CodeGen/ARM/cmpxchg.mir            | 58 +++++++++++++++++++++++++
 2 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 2167ad5d746..e68a3aa8bf4 100644
--- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -1647,7 +1647,7 @@ bool ARMExpandPseudo::ExpandCMP_SWAP(MachineBasicBlock &MBB,
            "CMP_SWAP not expected to be custom expanded for Thumb1");
     assert((UxtOp == 0 || UxtOp == ARM::tUXTB || UxtOp == ARM::tUXTH) &&
            "ARMv8-M.baseline does not have t2UXTB/t2UXTH");
-    assert(ARM::tGPRRegClass.contains(DesiredReg) &&
+    assert((UxtOp == 0 || ARM::tGPRRegClass.contains(DesiredReg)) &&
            "DesiredReg used for UXT op must be tGPR");
   }
 
diff --git a/test/CodeGen/ARM/cmpxchg.mir b/test/CodeGen/ARM/cmpxchg.mir
index 1b88dcdd7b2..dd640457fb0 100644
--- a/test/CodeGen/ARM/cmpxchg.mir
+++ b/test/CodeGen/ARM/cmpxchg.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -o - %s -mtriple=armv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7-unknown-linux-gnu -verify-machineinstrs -run-pass=arm-pseudo | FileCheck %s --check-prefix=THUMB
 ---
 name: func
 tracksRegLiveness: true
@@ -23,5 +24,62 @@ body: |
     ; CHECK: CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
     ; CHECK: Bcc %bb.1, 1 /* CC::ne */, killed $cpsr
     ; CHECK: .3:
+    ; THUMB-LABEL: name: func
+    ; THUMB: successors: %bb.1(0x80000000)
+    ; THUMB: liveins: $r0_r1, $r4_r5, $r3, $lr
+    ; THUMB: .1:
+    ; THUMB: successors: %bb.3(0x40000000), %bb.2(0x40000000)
+    ; THUMB: liveins: $r4, $r5, $r3
+    ; THUMB: $r0, $r1 = t2LDREXD $r3, 14 /* CC::al */, $noreg
+    ; THUMB: tCMPhir killed $r0, $r4, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; THUMB: tCMPhir killed $r1, $r5, 0 /* CC::eq */, killed $cpsr, implicit-def $cpsr
+    ; THUMB: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
+    ; THUMB: .2:
+    ; THUMB: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+    ; THUMB: liveins: $r4, $r5, $r3
+    ; THUMB: early-clobber $r2 = t2STREXD $r4, $r5, $r3, 14 /* CC::al */, $noreg
+    ; THUMB: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; THUMB: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
+    ; THUMB: .3:
     dead early-clobber renamable $r0_r1, dead early-clobber renamable $r2 = CMP_SWAP_64 killed renamable $r3, killed renamable $r4_r5, renamable $r4_r5 :: (volatile load store monotonic monotonic (s64))
 ...
+---
+name: func2
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $r1, $r2, $r3, $r12, $lr
+    ; CHECK-LABEL: name: func2
+    ; CHECK: successors: %bb.1(0x80000000)
+    ; CHECK: liveins: $r1, $r2, $r3, $r12, $lr
+    ; CHECK: .1:
+    ; CHECK: successors: %bb.3(0x40000000), %bb.2(0x40000000)
+    ; CHECK: liveins: $lr, $r3, $r12
+    ; CHECK: $r1 = LDREX $r3, 14 /* CC::al */, $noreg
+    ; CHECK: CMPrr killed $r1, $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK: Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+    ; CHECK: .2:
+    ; CHECK: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+    ; CHECK: liveins: $lr, $r3, $r12
+    ; CHECK: early-clobber $r2 = STREX $lr, $r3, 14 /* CC::al */, $noreg
+    ; CHECK: CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; CHECK: Bcc %bb.1, 1 /* CC::ne */, killed $cpsr
+    ; CHECK: .3:
+    ; THUMB-LABEL: name: func2
+    ; THUMB: successors: %bb.1(0x80000000)
+    ; THUMB: liveins: $r1, $r2, $r3, $r12, $lr
+    ; THUMB: .1:
+    ; THUMB: successors: %bb.3(0x40000000), %bb.2(0x40000000)
+    ; THUMB: liveins: $lr, $r3, $r12
+    ; THUMB: $r1 = t2LDREX $r3, 0, 14 /* CC::al */, $noreg
+    ; THUMB: tCMPhir killed $r1, $r12, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; THUMB: tBcc %bb.3, 1 /* CC::ne */, killed $cpsr
+    ; THUMB: .2:
+    ; THUMB: successors: %bb.1(0x40000000), %bb.3(0x40000000)
+    ; THUMB: liveins: $lr, $r3, $r12
+    ; THUMB: early-clobber $r2 = t2STREX $lr, $r3, 0, 14 /* CC::al */, $noreg
+    ; THUMB: t2CMPri killed $r2, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    ; THUMB: tBcc %bb.1, 1 /* CC::ne */, killed $cpsr
+    ; THUMB: .3:
+    dead early-clobber renamable $r1, dead early-clobber renamable $r2 = CMP_SWAP_32 killed renamable $r3, killed renamable $r12, killed renamable $lr
+...