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[ARM] Fix qdadd operand order

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qdadd is defined as sat(Rm + sat(2*Rn)). We had the Rm and Rn switched
the wrong way around.

Differential Revision: https://reviews.llvm.org/D77049
This commit is contained in:
David Green 2020-03-30 18:37:21 +01:00
parent 1b46d94279
commit 4d7a1b4d82
4 changed files with 10 additions and 11 deletions
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7
lib/Target/ARM/ARMInstrInfo.td
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@ -3829,9 +3829,8 @@ def QSUB16 : AAIIntrinsic<0b01100010, 0b11110111, "qsub16", int_arm_qsub16>;
def QSUB8 : AAIIntrinsic<0b01100010, 0b11111111, "qsub8", int_arm_qsub8>; def QSUB8 : AAIIntrinsic<0b01100010, 0b11111111, "qsub8", int_arm_qsub8>;
def QDADD : AAIRevOpr<0b00010100, 0b00000101, "qdadd", def QDADD : AAIRevOpr<0b00010100, 0b00000101, "qdadd",
[(set GPRnopc:$Rd, (int_arm_qadd (int_arm_qadd GPRnopc:$Rm, [(set GPRnopc:$Rd, (int_arm_qadd GPRnopc:$Rm,
GPRnopc:$Rm), (int_arm_qadd GPRnopc:$Rn, GPRnopc:$Rn)))]>;
GPRnopc:$Rn))]>;
def QDSUB : AAIRevOpr<0b00010110, 0b00000101, "qdsub", def QDSUB : AAIRevOpr<0b00010110, 0b00000101, "qdsub",
[(set GPRnopc:$Rd, (int_arm_qsub GPRnopc:$Rm, [(set GPRnopc:$Rd, (int_arm_qsub GPRnopc:$Rm,
(int_arm_qadd GPRnopc:$Rn, GPRnopc:$Rn)))]>; (int_arm_qadd GPRnopc:$Rn, GPRnopc:$Rn)))]>;
@ -3846,7 +3845,7 @@ def : ARMV5TEPat<(saddsat GPR:$a, GPR:$b),
(QADD GPR:$a, GPR:$b)>; (QADD GPR:$a, GPR:$b)>;
def : ARMV5TEPat<(ssubsat GPR:$a, GPR:$b), def : ARMV5TEPat<(ssubsat GPR:$a, GPR:$b),
(QSUB GPR:$a, GPR:$b)>; (QSUB GPR:$a, GPR:$b)>;
def : ARMV5TEPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn), def : ARMV5TEPat<(saddsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(QDADD rGPR:$Rm, rGPR:$Rn)>; (QDADD rGPR:$Rm, rGPR:$Rn)>;
def : ARMV5TEPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)), def : ARMV5TEPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(QDSUB rGPR:$Rm, rGPR:$Rn)>; (QDSUB rGPR:$Rm, rGPR:$Rn)>;

4
lib/Target/ARM/ARMInstrThumb2.td
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@ -2485,7 +2485,7 @@ def : Thumb2DSPPat<(int_arm_qadd rGPR:$Rm, rGPR:$Rn),
(t2QADD rGPR:$Rm, rGPR:$Rn)>; (t2QADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, rGPR:$Rn),
(t2QSUB rGPR:$Rm, rGPR:$Rn)>; (t2QSUB rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(int_arm_qadd(int_arm_qadd rGPR:$Rm, rGPR:$Rm), rGPR:$Rn), def : Thumb2DSPPat<(int_arm_qadd rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)),
(t2QDADD rGPR:$Rm, rGPR:$Rn)>; (t2QDADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)), def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)),
(t2QDSUB rGPR:$Rm, rGPR:$Rn)>; (t2QDSUB rGPR:$Rm, rGPR:$Rn)>;
@ -2494,7 +2494,7 @@ def : Thumb2DSPPat<(saddsat rGPR:$Rm, rGPR:$Rn),
(t2QADD rGPR:$Rm, rGPR:$Rn)>; (t2QADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ssubsat rGPR:$Rm, rGPR:$Rn), def : Thumb2DSPPat<(ssubsat rGPR:$Rm, rGPR:$Rn),
(t2QSUB rGPR:$Rm, rGPR:$Rn)>; (t2QSUB rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn), def : Thumb2DSPPat<(saddsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(t2QDADD rGPR:$Rm, rGPR:$Rn)>; (t2QDADD rGPR:$Rm, rGPR:$Rn)>;
def : Thumb2DSPPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)), def : Thumb2DSPPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
(t2QDSUB rGPR:$Rm, rGPR:$Rn)>; (t2QDSUB rGPR:$Rm, rGPR:$Rn)>;

2
test/CodeGen/ARM/acle-intrinsics-v5.ll
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@ -80,7 +80,7 @@ define i32 @qsub(i32 %a, i32 %b) nounwind {
define i32 @qdadd(i32 %a, i32 %b) nounwind { define i32 @qdadd(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: qdadd ; CHECK-LABEL: qdadd
; CHECK: qdadd r0, r0, r1 ; CHECK: qdadd r0, r1, r0
%dbl = call i32 @llvm.arm.qadd(i32 %a, i32 %a) %dbl = call i32 @llvm.arm.qadd(i32 %a, i32 %a)
%add = call i32 @llvm.arm.qadd(i32 %dbl, i32 %b) %add = call i32 @llvm.arm.qadd(i32 %dbl, i32 %b)
ret i32 %add ret i32 %add

8
test/CodeGen/ARM/qdadd.ll
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@ -36,12 +36,12 @@ define i32 @qdadd(i32 %x, i32 %y) nounwind {
; ;
; CHECK-T2DSP-LABEL: qdadd: ; CHECK-T2DSP-LABEL: qdadd:
; CHECK-T2DSP: @ %bb.0: ; CHECK-T2DSP: @ %bb.0:
; CHECK-T2DSP-NEXT: qdadd r0, r0, r1 ; CHECK-T2DSP-NEXT: qdadd r0, r1, r0
; CHECK-T2DSP-NEXT: bx lr ; CHECK-T2DSP-NEXT: bx lr
; ;
; CHECK-ARM-LABEL: qdadd: ; CHECK-ARM-LABEL: qdadd:
; CHECK-ARM: @ %bb.0: ; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: qdadd r0, r0, r1 ; CHECK-ARM-NEXT: qdadd r0, r1, r0
; CHECK-ARM-NEXT: bx lr ; CHECK-ARM-NEXT: bx lr
%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x) %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
%tmp = call i32 @llvm.sadd.sat.i32(i32 %z, i32 %y) %tmp = call i32 @llvm.sadd.sat.i32(i32 %z, i32 %y)
@ -80,12 +80,12 @@ define i32 @qdadd_c(i32 %x, i32 %y) nounwind {
; ;
; CHECK-T2DSP-LABEL: qdadd_c: ; CHECK-T2DSP-LABEL: qdadd_c:
; CHECK-T2DSP: @ %bb.0: ; CHECK-T2DSP: @ %bb.0:
; CHECK-T2DSP-NEXT: qdadd r0, r0, r1 ; CHECK-T2DSP-NEXT: qdadd r0, r1, r0
; CHECK-T2DSP-NEXT: bx lr ; CHECK-T2DSP-NEXT: bx lr
; ;
; CHECK-ARM-LABEL: qdadd_c: ; CHECK-ARM-LABEL: qdadd_c:
; CHECK-ARM: @ %bb.0: ; CHECK-ARM: @ %bb.0:
; CHECK-ARM-NEXT: qdadd r0, r0, r1 ; CHECK-ARM-NEXT: qdadd r0, r1, r0
; CHECK-ARM-NEXT: bx lr ; CHECK-ARM-NEXT: bx lr
%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x) %z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
%tmp = call i32 @llvm.sadd.sat.i32(i32 %y, i32 %z) %tmp = call i32 @llvm.sadd.sat.i32(i32 %y, i32 %z)