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[ARM] Fix qdadd operand order
qdadd is defined as sat(Rm + sat(2*Rn)). We had the Rm and Rn switched the wrong way around. Differential Revision: https://reviews.llvm.org/D77049
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@ -3829,9 +3829,8 @@ def QSUB16 : AAIIntrinsic<0b01100010, 0b11110111, "qsub16", int_arm_qsub16>;
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def QSUB8 : AAIIntrinsic<0b01100010, 0b11111111, "qsub8", int_arm_qsub8>;
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def QDADD : AAIRevOpr<0b00010100, 0b00000101, "qdadd",
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[(set GPRnopc:$Rd, (int_arm_qadd (int_arm_qadd GPRnopc:$Rm,
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GPRnopc:$Rm),
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GPRnopc:$Rn))]>;
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[(set GPRnopc:$Rd, (int_arm_qadd GPRnopc:$Rm,
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(int_arm_qadd GPRnopc:$Rn, GPRnopc:$Rn)))]>;
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def QDSUB : AAIRevOpr<0b00010110, 0b00000101, "qdsub",
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[(set GPRnopc:$Rd, (int_arm_qsub GPRnopc:$Rm,
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(int_arm_qadd GPRnopc:$Rn, GPRnopc:$Rn)))]>;
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@ -3846,7 +3845,7 @@ def : ARMV5TEPat<(saddsat GPR:$a, GPR:$b),
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(QADD GPR:$a, GPR:$b)>;
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def : ARMV5TEPat<(ssubsat GPR:$a, GPR:$b),
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(QSUB GPR:$a, GPR:$b)>;
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def : ARMV5TEPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
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def : ARMV5TEPat<(saddsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
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(QDADD rGPR:$Rm, rGPR:$Rn)>;
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def : ARMV5TEPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
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(QDSUB rGPR:$Rm, rGPR:$Rn)>;
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@ -2485,7 +2485,7 @@ def : Thumb2DSPPat<(int_arm_qadd rGPR:$Rm, rGPR:$Rn),
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(t2QADD rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, rGPR:$Rn),
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(t2QSUB rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(int_arm_qadd(int_arm_qadd rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
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def : Thumb2DSPPat<(int_arm_qadd rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)),
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(t2QDADD rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(int_arm_qsub rGPR:$Rm, (int_arm_qadd rGPR:$Rn, rGPR:$Rn)),
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(t2QDSUB rGPR:$Rm, rGPR:$Rn)>;
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@ -2494,7 +2494,7 @@ def : Thumb2DSPPat<(saddsat rGPR:$Rm, rGPR:$Rn),
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(t2QADD rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(ssubsat rGPR:$Rm, rGPR:$Rn),
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(t2QSUB rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(saddsat(saddsat rGPR:$Rm, rGPR:$Rm), rGPR:$Rn),
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def : Thumb2DSPPat<(saddsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
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(t2QDADD rGPR:$Rm, rGPR:$Rn)>;
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def : Thumb2DSPPat<(ssubsat rGPR:$Rm, (saddsat rGPR:$Rn, rGPR:$Rn)),
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(t2QDSUB rGPR:$Rm, rGPR:$Rn)>;
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@ -80,7 +80,7 @@ define i32 @qsub(i32 %a, i32 %b) nounwind {
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define i32 @qdadd(i32 %a, i32 %b) nounwind {
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; CHECK-LABEL: qdadd
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; CHECK: qdadd r0, r0, r1
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; CHECK: qdadd r0, r1, r0
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%dbl = call i32 @llvm.arm.qadd(i32 %a, i32 %a)
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%add = call i32 @llvm.arm.qadd(i32 %dbl, i32 %b)
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ret i32 %add
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@ -36,12 +36,12 @@ define i32 @qdadd(i32 %x, i32 %y) nounwind {
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;
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; CHECK-T2DSP-LABEL: qdadd:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: qdadd r0, r0, r1
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; CHECK-T2DSP-NEXT: qdadd r0, r1, r0
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: qdadd:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: qdadd r0, r0, r1
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; CHECK-ARM-NEXT: qdadd r0, r1, r0
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; CHECK-ARM-NEXT: bx lr
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%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
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%tmp = call i32 @llvm.sadd.sat.i32(i32 %z, i32 %y)
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@ -80,12 +80,12 @@ define i32 @qdadd_c(i32 %x, i32 %y) nounwind {
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;
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; CHECK-T2DSP-LABEL: qdadd_c:
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; CHECK-T2DSP: @ %bb.0:
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; CHECK-T2DSP-NEXT: qdadd r0, r0, r1
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; CHECK-T2DSP-NEXT: qdadd r0, r1, r0
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; CHECK-T2DSP-NEXT: bx lr
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;
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; CHECK-ARM-LABEL: qdadd_c:
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; CHECK-ARM: @ %bb.0:
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; CHECK-ARM-NEXT: qdadd r0, r0, r1
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; CHECK-ARM-NEXT: qdadd r0, r1, r0
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; CHECK-ARM-NEXT: bx lr
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%z = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %x)
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%tmp = call i32 @llvm.sadd.sat.i32(i32 %y, i32 %z)
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