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* Removed extraneous #includes
* Fixed file headers to be consistent with the rest of LLVM * Other minor fixes llvm-svn: 3277
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@ -1,8 +1,5 @@
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// InstrForest.h
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//
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//===-- llvm/CodeGen/InstForest.h ------------------------------*- C++ -*--===//
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//
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// Purpose:
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// Convert SSA graph to instruction trees for instruction selection.
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//
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@ -17,9 +14,7 @@
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// (2) O and I are part of the same basic block, and
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// (3) O has only a single use, viz., I.
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//
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// History:
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// 6/28/01 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_INSTRFOREST_H
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#define LLVM_CODEGEN_INSTRFOREST_H
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@ -1,14 +1,8 @@
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// InstrSelection.h
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//
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// Purpose:
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// External interface to instruction selection.
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//
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// History:
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// 7/02/01 - Vikram Adve - Created
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//**************************************************************************/
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//===-- llvm/CodeGen/InstrSelection.h --------------------------*- C++ -*--===//
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//
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// External interface to instruction selection.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_INSTR_SELECTION_H
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#define LLVM_CODEGEN_INSTR_SELECTION_H
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@ -21,9 +15,9 @@ class InstructionNode;
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class TargetMachine;
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class Pass;
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/************************* Required Functions *******************************
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* Target-dependent functions that MUST be implemented for each target.
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***************************************************************************/
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//===--------------------- Required Functions ---------------------------------
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// Target-dependent functions that MUST be implemented for each target.
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//
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const unsigned MAX_INSTR_PER_VMINSTR = 8;
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@ -1,15 +1,9 @@
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// InstrSelectionSupport.h
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//
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// Purpose:
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// Target-independent instruction selection code.
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// See SparcInstrSelection.cpp for usage.
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//===-- llvm/CodeGen/InstrSelectionSupport.h --------------------*- C++ -*-===//
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//
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// Target-independent instruction selection code. See SparcInstrSelection.cpp
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// for usage.
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//
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// History:
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// 10/10/01 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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#define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H
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@ -1,29 +1,20 @@
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// MachineInstrAnnot.h
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//===-- llvm/CodeGen/MachineInstrAnnot.h ------------------------*- C++ -*-===//
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//
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// Annotations used to pass information between code generation phases.
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//
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// Purpose:
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// Annotations used to pass information between code generation phases.
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//
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// History:
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// 5/10/02 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#ifndef MACHINE_INSTR_ANNOT_h
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#define MACHINE_INSTR_ANNOT_h
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#include "llvm/Annotation.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include <vector>
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class Value;
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class TmpInstruction;
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class CallInst;
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class CallArgInfo {
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private:
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// Flag values for different argument passing methods
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static const unsigned char IntArgReg = 0x1;
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static const unsigned char FPArgReg = 0x2;
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@ -60,9 +51,8 @@ public:
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class CallArgsDescriptor: public Annotation { // Annotation for a MachineInstr
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private:
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static AnnotationID AID; // AnnotationID for this class
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std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument
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std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument
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const CallInst* callInstr; // The call instruction == result value
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const Value* funcPtr; // Pointer for indirect calls
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TmpInstruction* retAddrReg; // Tmp value for return address reg.
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@ -13,7 +13,6 @@
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instruction.h"
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#include "Support/CommandLine.h"
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#include <algorithm>
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using std::cerr;
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@ -1,20 +1,15 @@
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/* -*-C++-*-
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****************************************************************************
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* File:
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* SchedGraph.h
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*
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* Purpose:
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* Scheduling graph based on SSA graph plus extra dependence edges
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* capturing dependences due to machine resources (machine registers,
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* CC registers, and any others).
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*
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* Strategy:
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* This graph tries to leverage the SSA graph as much as possible,
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* but captures the extra dependences through a common interface.
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*
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* History:
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* 7/20/01 - Vikram Adve - Created
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***************************************************************************/
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//===-- SchedGraph.h - Scheduling Graph --------------------------*- C++ -*--=//
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//
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// Purpose:
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// Scheduling graph based on SSA graph plus extra dependence edges
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// capturing dependences due to machine resources (machine registers,
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// CC registers, and any others).
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//
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// Strategy:
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// This graph tries to leverage the SSA graph as much as possible,
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// but captures the extra dependences through a common interface.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SCHEDGRAPH_H
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#define LLVM_CODEGEN_SCHEDGRAPH_H
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// $Id$ -*-C++-*-
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//***************************************************************************
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// File:
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// SchedPriorities.h
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//
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// Purpose:
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// Encapsulate heuristics for instruction scheduling.
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//===-- SchedPriorities.h - Encapsulate scheduling heuristics -------------===//
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//
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// Strategy:
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// Priority ordering rules:
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@ -13,10 +7,8 @@
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// (3) Instruction that has the maximum number of dependent instructions.
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// Note that rules 2 and 3 are only used if issue conflicts prevent
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// choosing a higher priority instruction by rule 1.
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//
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// History:
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// 7/30/01 - Vikram Adve - Created
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//**************************************************************************/
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//
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//===----------------------------------------------------------------------===//
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#include "SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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// -*-C++-*-
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//***************************************************************************
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// File:
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// SchedPriorities.h
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//
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// Purpose:
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// Encapsulate heuristics for instruction scheduling.
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//===-- SchedPriorities.h - Encapsulate scheduling heuristics --*- C++ -*--===//
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//
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// Strategy:
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// Priority ordering rules:
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@ -13,10 +7,8 @@
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// (3) Instruction that has the maximum number of dependent instructions.
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// Note that rules 2 and 3 are only used if issue conflicts prevent
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// choosing a higher priority instruction by rule 1.
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//
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// History:
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// 7/30/01 - Vikram Adve - Created
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//**************************************************************************/
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_SCHEDPRIORITIES_H
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#define LLVM_CODEGEN_SCHEDPRIORITIES_H
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#include "llvm/Target/MachineSchedInfo.h"
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#include <list>
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#include <Support/hash_set>
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#include <iostream>
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class Function;
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class MachineInstr;
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class SchedulingManager;
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//***************************************************************************
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// File:
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// PhyRegAlloc.cpp
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//===-- PhyRegAlloc.cpp ---------------------------------------------------===//
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//
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// Purpose:
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// Register allocation for LLVM.
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//
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// History:
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// 9/10/01 - Ruchira Sasanka - created.
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//**************************************************************************/
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// Register allocation for LLVM.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/RegisterAllocation.h"
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#include "llvm/CodeGen/PhyRegAlloc.h"
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// $Id$ -*-c++-*-
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//***************************************************************************
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// File:
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// MachineFrameInfo.cpp
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//===-- MachineFrameInfo.cpp-----------------------------------------------===//
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//
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// Purpose:
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// Interface to layout of stack frame on target machine.
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// Most functions of class MachineFrameInfo have to be machine-specific
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// so there is little code here.
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// Interface to layout of stack frame on target machine. Most functions of
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// class MachineFrameInfo have to be machine-specific so there is little code
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// here.
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//
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// History:
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// 4/17/02 - Vikram Adve - Created
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//**************************************************************************/
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineCodeForMethod.h"
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int
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MachineFrameInfo::getIncomingArgOffset(MachineCodeForMethod& mcInfo,
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unsigned argNum) const
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