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[XRay] Change mips to use version 2 sled (PC-relative address)

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Follow-up to D78590. All targets use PC-relative addresses now.

Reviewed By: atanasyan, dberris

Differential Revision: https://reviews.llvm.org/D87977
This commit is contained in:
Fangrui Song 2020-09-19 15:44:39 -07:00
parent e56a524153
commit 4dabbec93d
4 changed files with 82 additions and 89 deletions
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39
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
View File

@ -3253,14 +3253,10 @@ void AsmPrinter::emitXRayTable() {
MCSection *InstMap = nullptr;
MCSection *FnSledIndex = nullptr;
const Triple &TT = TM.getTargetTriple();
// Use PC-relative addresses on all targets except MIPS (MIPS64 cannot use
// PC-relative addresses because R_MIPS_PC64 does not exist).
bool PCRel = !TT.isMIPS();
// Use PC-relative addresses on all targets.
if (TT.isOSBinFormatELF()) {
auto LinkedToSym = cast<MCSymbolELF>(CurrentFnSym);
auto Flags = ELF::SHF_ALLOC | ELF::SHF_LINK_ORDER;
if (!PCRel)
Flags |= ELF::SHF_WRITE;
StringRef GroupName;
if (F.hasComdat()) {
Flags |= ELF::SHF_GROUP;
@ -3294,25 +3290,20 @@ void AsmPrinter::emitXRayTable() {
OutStreamer->SwitchSection(InstMap);
OutStreamer->emitLabel(SledsStart);
for (const auto &Sled : Sleds) {
if (PCRel) {
MCSymbol *Dot = Ctx.createTempSymbol();
OutStreamer->emitLabel(Dot);
OutStreamer->emitValueImpl(
MCBinaryExpr::createSub(MCSymbolRefExpr::create(Sled.Sled, Ctx),
MCSymbolRefExpr::create(Dot, Ctx), Ctx),
WordSizeBytes);
OutStreamer->emitValueImpl(
MCBinaryExpr::createSub(
MCSymbolRefExpr::create(CurrentFnBegin, Ctx),
MCBinaryExpr::createAdd(
MCSymbolRefExpr::create(Dot, Ctx),
MCConstantExpr::create(WordSizeBytes, Ctx), Ctx),
Ctx),
WordSizeBytes);
} else {
OutStreamer->emitSymbolValue(Sled.Sled, WordSizeBytes);
OutStreamer->emitSymbolValue(CurrentFnSym, WordSizeBytes);
}
MCSymbol *Dot = Ctx.createTempSymbol();
OutStreamer->emitLabel(Dot);
OutStreamer->emitValueImpl(
MCBinaryExpr::createSub(MCSymbolRefExpr::create(Sled.Sled, Ctx),
MCSymbolRefExpr::create(Dot, Ctx), Ctx),
WordSizeBytes);
OutStreamer->emitValueImpl(
MCBinaryExpr::createSub(
MCSymbolRefExpr::create(CurrentFnBegin, Ctx),
MCBinaryExpr::createAdd(MCSymbolRefExpr::create(Dot, Ctx),
MCConstantExpr::create(WordSizeBytes, Ctx),
Ctx),
Ctx),
WordSizeBytes);
Sled.emit(WordSizeBytes, OutStreamer.get());
}
MCSymbol *SledsEnd = OutContext.createTempSymbol("xray_sleds_end", true);

2
lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -1233,7 +1233,7 @@ void MipsAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind) {
.addImm(0x34));
}
recordSled(CurSled, MI, Kind);
recordSled(CurSled, MI, Kind, 2);
}
void MipsAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI) {

126
test/CodeGen/Mips/xray-mips-attribute-instrumentation.ll
View File

@ -52,72 +52,21 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
; CHECK-MIPS32-LABEL: $tmp2:
; CHECK-MIPS32: addiu $25, $25, 52
}
; CHECK: .section xray_instr_map,{{.*}}
; CHECK-MIPS64: .8byte .Lxray_sled_0
; CHECK-MIPS64: .8byte .Lxray_sled_1
; CHECK-MIPS32: .4byte ($xray_sled_0)
; CHECK-MIPS32: .4byte ($xray_sled_1)
; CHECK: .section xray_instr_map,"ao",@progbits,foo
; CHECK-MIPS64: .Ltmp3:
; CHECK-MIPS64-NEXT: .8byte .Lxray_sled_0-.Ltmp3
; CHECK-MIPS64-NEXT: .8byte .Lfunc_begin0-(.Ltmp3+8)
; CHECK-MIPS32: $tmp3:
; CHECK-MIPS32-NEXT: .4byte ($xray_sled_0)-($tmp3)
; CHECK-MIPS32-NEXT: .4byte ($func_begin0)-(($tmp3)+4)
; We test multiple returns in a single function to make sure we're getting all
; of them with XRay instrumentation.
define i32 @bar(i32 %i) nounwind noinline uwtable "function-instrument"="xray-always" {
; CHECK: .p2align 2
; CHECK-MIPS64-LABEL: .Lxray_sled_2:
; CHECK-MIPS64-NEXT: b .Ltmp4
; CHECK-MIPS32-LABEL: $xray_sled_2:
; CHECK-MIPS32-NEXT: b $tmp4
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64-LABEL: .Ltmp4:
; CHECK-MIPS32-LABEL: $tmp4:
; CHECK-MIPS32: addiu $25, $25, 52
Test:
%cond = icmp eq i32 %i, 0
br i1 %cond, label %IsEqual, label %NotEqual
IsEqual:
ret i32 0
; CHECK: .p2align 2
; CHECK-MIPS64-LABEL: .Lxray_sled_3:
; CHECK-MIPS64-NEXT: b .Ltmp5
; CHECK-MIPS32-LABEL: $xray_sled_3:
; CHECK-MIPS32-NEXT: b $tmp5
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64-LABEL: .Ltmp5:
; CHECK-MIPS32-LABEL: $tmp5:
; CHECK-MIPS32: addiu $25, $25, 52
NotEqual:
ret i32 1
; CHECK: .p2align 2
; CHECK-MIPS64-LABEL: .Lxray_sled_4:
; CHECK-MIPS64-NEXT: b .Ltmp6
; CHECK-MIPS32-LABEL: $xray_sled_4:
; CHECK-MIPS32-LABEL: $xray_sled_2:
; CHECK-MIPS32-NEXT: b $tmp6
; CHECK-NEXT: nop
; CHECK-NEXT: nop
@ -137,11 +86,64 @@ NotEqual:
; CHECK-MIPS64-LABEL: .Ltmp6:
; CHECK-MIPS32-LABEL: $tmp6:
; CHECK-MIPS32: addiu $25, $25, 52
Test:
%cond = icmp eq i32 %i, 0
br i1 %cond, label %IsEqual, label %NotEqual
IsEqual:
ret i32 0
; CHECK: .p2align 2
; CHECK-MIPS64-LABEL: .Lxray_sled_3:
; CHECK-MIPS64-NEXT: b .Ltmp7
; CHECK-MIPS32-LABEL: $xray_sled_3:
; CHECK-MIPS32-NEXT: b $tmp7
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64-LABEL: .Ltmp7:
; CHECK-MIPS32-LABEL: $tmp7:
; CHECK-MIPS32: addiu $25, $25, 52
NotEqual:
ret i32 1
; CHECK: .p2align 2
; CHECK-MIPS64-LABEL: .Lxray_sled_4:
; CHECK-MIPS64-NEXT: b .Ltmp8
; CHECK-MIPS32-LABEL: $xray_sled_4:
; CHECK-MIPS32-NEXT: b $tmp8
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-NEXT: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64: nop
; CHECK-MIPS64-LABEL: .Ltmp8:
; CHECK-MIPS32-LABEL: $tmp8:
; CHECK-MIPS32: addiu $25, $25, 52
}
; CHECK: .section xray_instr_map,{{.*}}
; CHECK-MIPS64: .8byte .Lxray_sled_2
; CHECK-MIPS64: .8byte .Lxray_sled_3
; CHECK-MIPS64: .8byte .Lxray_sled_4
; CHECK-MIPS32: .4byte ($xray_sled_2)
; CHECK-MIPS32: .4byte ($xray_sled_3)
; CHECK-MIPS32: .4byte ($xray_sled_4)
; CHECK-MIPS32: .4byte ($xray_sled_2)-($tmp9)
; CHECK-MIPS32: .4byte ($xray_sled_3)-($tmp10)
; CHECK-MIPS32: .4byte ($xray_sled_4)-($tmp11)

4
test/CodeGen/Mips/xray-section-group.ll
View File

@ -14,7 +14,7 @@
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
; CHECK: .section .text.foo,"ax",@progbits
ret i32 0
; CHECK: .section xray_instr_map,"awo",@progbits,foo{{$}}
; CHECK: .section xray_instr_map,"ao",@progbits,foo{{$}}
}
; CHECK-OBJ: Section {
@ -24,7 +24,7 @@ $bar = comdat any
define i32 @bar() nounwind noinline uwtable "function-instrument"="xray-always" comdat($bar) {
; CHECK: .section .text.bar,"axG",@progbits,bar,comdat
ret i32 1
; CHECK: .section xray_instr_map,"aGwo",@progbits,bar,comdat,bar{{$}}
; CHECK: .section xray_instr_map,"aGo",@progbits,bar,comdat,bar{{$}}
}
; CHECK-OBJ: Section {