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[X86] Add test case for llvm.flt.rounds
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test/CodeGen/X86/flt-rounds.ll
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38
test/CodeGen/X86/flt-rounds.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s -check-prefixes=X86,X86-NOSSE
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; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse2 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=X86,X86-SSE
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefixes=X64
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declare i32 @llvm.flt.rounds()
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define i32 @test_flt_rounds() nounwind {
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; X86-LABEL: test_flt_rounds:
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; X86: # %bb.0:
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; X86-NEXT: subl $12, %esp
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; X86-NEXT: fnstcw (%esp)
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; X86-NEXT: movl (%esp), %eax
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; X86-NEXT: movl %eax, %ecx
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; X86-NEXT: shrl $9, %ecx
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; X86-NEXT: andl $2, %ecx
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; X86-NEXT: shrl $11, %eax
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; X86-NEXT: andl $1, %eax
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; X86-NEXT: leal 1(%eax,%ecx), %eax
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; X86-NEXT: andl $3, %eax
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; X86-NEXT: addl $12, %esp
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; X86-NEXT: retl
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;
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; X64-LABEL: test_flt_rounds:
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; X64: # %bb.0:
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: movl %eax, %ecx
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; X64-NEXT: shrl $9, %ecx
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; X64-NEXT: andl $2, %ecx
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; X64-NEXT: shrl $11, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: leal 1(%rax,%rcx), %eax
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; X64-NEXT: andl $3, %eax
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; X64-NEXT: retq
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%1 = call i32 @llvm.flt.rounds()
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ret i32 %1
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}
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