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[DAGCombine] Add basic optimizations for FREEZE in SelDag

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Summary: This patch is the first effort to adding basic optimizations for FREEZE in SelDag.

Reviewers: spatel, lebedev.ri

Reviewed By: spatel

Subscribers: xbolva00, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76707
This commit is contained in:
Juneyoung Lee 2020-03-24 23:57:40 +09:00
parent a7f9ea705a
commit 4e8997371c
6 changed files with 58 additions and 42 deletions
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3
include/llvm/CodeGen/SelectionDAG.h
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@ -1224,6 +1224,9 @@ public:
SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS,
unsigned DestAS);
/// Return a freeze using the SDLoc of the value operand.
SDValue getFreeze(SDValue V);
/// Return the specified value casted to
/// the target's desired shift amount type.
SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op);

16
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -436,6 +436,7 @@ namespace {
SDValue visitZERO_EXTEND_VECTOR_INREG(SDNode *N);
SDValue visitTRUNCATE(SDNode *N);
SDValue visitBITCAST(SDNode *N);
SDValue visitFREEZE(SDNode *N);
SDValue visitBUILD_PAIR(SDNode *N);
SDValue visitFADD(SDNode *N);
SDValue visitFSUB(SDNode *N);
@ -1622,6 +1623,7 @@ SDValue DAGCombiner::visit(SDNode *N) {
case ISD::LIFETIME_END: return visitLIFETIME_END(N);
case ISD::FP_TO_FP16: return visitFP_TO_FP16(N);
case ISD::FP16_TO_FP: return visitFP16_TO_FP(N);
case ISD::FREEZE: return visitFREEZE(N);
case ISD::VECREDUCE_FADD:
case ISD::VECREDUCE_FMUL:
case ISD::VECREDUCE_ADD:
@ -11576,6 +11578,20 @@ SDValue DAGCombiner::visitBUILD_PAIR(SDNode *N) {
return CombineConsecutiveLoads(N, VT);
}
SDValue DAGCombiner::visitFREEZE(SDNode *N) {
SDValue N0 = N->getOperand(0);
// (freeze (freeze x)) -> (freeze x)
if (N0.getOpcode() == ISD::FREEZE)
return N0;
// If the input is a constant, return it.
if (isa<ConstantSDNode>(N0) || isa<ConstantFPSDNode>(N0))
return N0;
return SDValue();
}
/// We know that BV is a build_vector node with Constant, ConstantFP or Undef
/// operands. DstEltVT indicates the destination element value type.
SDValue DAGCombiner::

4
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -1927,6 +1927,10 @@ SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
return SDValue(N, 0);
}
SDValue SelectionDAG::getFreeze(SDValue V) {
return getNode(ISD::FREEZE, SDLoc(V), V.getValueType(), V);
}
/// getShiftAmountOperand - Return the specified value casted to
/// the target's desired shift amount type.
SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {

4
test/CodeGen/X86/fast-isel-freeze.ll
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@ -5,8 +5,8 @@
define i32 @freeze(i32 %t) {
; SDAG-LABEL: freeze:
; SDAG: # %bb.0:
; SDAG-NEXT: movl $10, %eax
; SDAG-NEXT: xorl %edi, %eax
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: xorl $10, %eax
; SDAG-NEXT: retq
;
; FAST-LABEL: freeze:

24
test/CodeGen/X86/freeze-combine.ll Normal file
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@ -0,0 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -stop-after=finalize-isel -mtriple=x86_64-unknown < %s 2>&1 | FileCheck %s
define i32 @const() {
; CHECK-LABEL: name: const
; CHECK: bb.0 (%ir-block.0):
; CHECK: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 1
; CHECK: $eax = COPY [[MOV32ri]]
; CHECK: RET 0, $eax
%y = freeze i32 1
ret i32 %y
}
define i32 @fold(i32 %x) {
; CHECK-LABEL: name: fold
; CHECK: bb.0 (%ir-block.0):
; CHECK: liveins: $edi
; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY [[COPY]]
; CHECK: $eax = COPY [[COPY1]]
; CHECK: RET 0, $eax
%y = freeze i32 %x
%z = freeze i32 %y
ret i32 %z
}

49
test/CodeGen/X86/freeze-legalize.ll
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@ -5,12 +5,8 @@
define i64 @expand(i32 %x) {
; CHECK-LABEL: expand:
; CHECK: ## %bb.0:
; CHECK-NEXT: movl $303174162, %eax ## imm = 0x12121212
; CHECK-NEXT: movl $875836468, %ecx ## imm = 0x34343434
; CHECK-NEXT: movl $1448498774, %edx ## imm = 0x56565656
; CHECK-NEXT: xorl %eax, %edx
; CHECK-NEXT: movl $2021161080, %eax ## imm = 0x78787878
; CHECK-NEXT: xorl %ecx, %eax
; CHECK-NEXT: movl $1280068684, %eax ## imm = 0x4C4C4C4C
; CHECK-NEXT: movl $1145324612, %edx ## imm = 0x44444444
; CHECK-NEXT: retl
%y1 = freeze i64 1302123111658042420 ; 0x1212121234343434
%y2 = freeze i64 6221254864647256184 ; 0x5656565678787878
@ -22,29 +18,11 @@ define i64 @expand(i32 %x) {
define <2 x i64> @expand_vec(i32 %x) nounwind {
; CHECK-LABEL: expand_vec:
; CHECK: ## %bb.0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl $16843009, %ecx ## imm = 0x1010101
; CHECK-NEXT: movl $589505315, %edx ## imm = 0x23232323
; CHECK-NEXT: movl $303174162, %esi ## imm = 0x12121212
; CHECK-NEXT: movl $875836468, %edi ## imm = 0x34343434
; CHECK-NEXT: movl $1162167621, %ebx ## imm = 0x45454545
; CHECK-NEXT: xorl %ecx, %ebx
; CHECK-NEXT: movl $1734829927, %ecx ## imm = 0x67676767
; CHECK-NEXT: xorl %edx, %ecx
; CHECK-NEXT: movl $1448498774, %edx ## imm = 0x56565656
; CHECK-NEXT: xorl %esi, %edx
; CHECK-NEXT: movl $2021161080, %esi ## imm = 0x78787878
; CHECK-NEXT: xorl %edi, %esi
; CHECK-NEXT: movl %ebx, 12(%eax)
; CHECK-NEXT: movl %ecx, 8(%eax)
; CHECK-NEXT: movl %edx, 4(%eax)
; CHECK-NEXT: movl %esi, (%eax)
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: movl $1145324612, 12(%eax) ## imm = 0x44444444
; CHECK-NEXT: movl $1145324612, 8(%eax) ## imm = 0x44444444
; CHECK-NEXT: movl $1145324612, 4(%eax) ## imm = 0x44444444
; CHECK-NEXT: movl $1280068684, (%eax) ## imm = 0x4C4C4C4C
; CHECK-NEXT: retl $4
; <0x1212121234343434, 0x101010123232323>
%y1 = freeze <2 x i64> <i64 1302123111658042420, i64 72340173410738979>
@ -57,10 +35,7 @@ define <2 x i64> @expand_vec(i32 %x) nounwind {
define i10 @promote() {
; CHECK-LABEL: promote:
; CHECK: ## %bb.0:
; CHECK-NEXT: movw $682, %cx ## imm = 0x2AA
; CHECK-NEXT: movw $992, %ax ## imm = 0x3E0
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
; CHECK-NEXT: movw $650, %ax ## imm = 0x28A
; CHECK-NEXT: retl
%a = freeze i10 682
%b = freeze i10 992
@ -71,14 +46,8 @@ define i10 @promote() {
define <2 x i10> @promote_vec() {
; CHECK-LABEL: promote_vec:
; CHECK: ## %bb.0:
; CHECK-NEXT: movw $125, %ax
; CHECK-NEXT: movw $682, %cx ## imm = 0x2AA
; CHECK-NEXT: movw $393, %dx ## imm = 0x189
; CHECK-NEXT: addl %eax, %edx
; CHECK-NEXT: movw $992, %ax ## imm = 0x3E0
; CHECK-NEXT: addl %ecx, %eax
; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
; CHECK-NEXT: ## kill: def $dx killed $dx killed $edx
; CHECK-NEXT: movw $1674, %ax ## imm = 0x68A
; CHECK-NEXT: movw $518, %dx ## imm = 0x206
; CHECK-NEXT: retl
%a = freeze <2 x i10> <i10 682, i10 125>
%b = freeze <2 x i10> <i10 992, i10 393>