diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp index f1a82f1cf60..21588385292 100644 --- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -222,14 +222,17 @@ void NVPTXTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB, return false; }); - PB.registerPipelineStartEPCallback( - [this, DebugPassManager](ModulePassManager &PM, - PassBuilder::OptimizationLevel Level) { - FunctionPassManager FPM(DebugPassManager); - FPM.addPass(NVVMReflectPass(Subtarget.getSmVersion())); - FPM.addPass(NVVMIntrRangePass(Subtarget.getSmVersion())); - PM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM))); - }); + // FIXME: these passes are causing numerical discrepancies, investigate and + // re-enable. + + // PB.registerPipelineStartEPCallback( + // [this, DebugPassManager](ModulePassManager &PM, + // PassBuilder::OptimizationLevel Level) { + // FunctionPassManager FPM(DebugPassManager); + // FPM.addPass(NVVMReflectPass(Subtarget.getSmVersion())); + // FPM.addPass(NVVMIntrRangePass(Subtarget.getSmVersion())); + // PM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM))); + // }); } TargetTransformInfo diff --git a/test/CodeGen/NVPTX/nvvm-reflect-arch.ll b/test/CodeGen/NVPTX/nvvm-reflect-arch.ll index 8e8d866504d..faab35525f7 100644 --- a/test/CodeGen/NVPTX/nvvm-reflect-arch.ll +++ b/test/CodeGen/NVPTX/nvvm-reflect-arch.ll @@ -1,9 +1,10 @@ ; Libdevice in recent CUDA versions relies on __CUDA_ARCH reflecting GPU type. ; Verify that __nvvm_reflect() is replaced with an appropriate value. ; -; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 \ +; FIXME: fix pass and re-enable under new PM +; RUN: opt %s -S -nvvm-reflect -O2 -enable-new-pm=0 -mtriple=nvptx64 \ ; RUN: | FileCheck %s --check-prefixes=COMMON,SM20 -; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 -mcpu=sm_35 \ +; RUN: opt %s -S -nvvm-reflect -O2 -enable-new-pm=0 -mtriple=nvptx64 -mcpu=sm_35 \ ; RUN: | FileCheck %s --check-prefixes=COMMON,SM35 @"$str" = private addrspace(1) constant [12 x i8] c"__CUDA_ARCH\00"