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Recognise 32-bit ror-based bswap implementation used by uclibc

llvm-svn: 119007
This commit is contained in:
Peter Collingbourne 2010-11-13 19:54:30 +00:00
parent 6c3094234e
commit 4ec6b2dbe7
2 changed files with 36 additions and 0 deletions

View File

@ -11451,6 +11451,35 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
} }
break; break;
case 3: case 3:
if (CI->getType()->isIntegerTy(32) &&
IA->getConstraintString().compare(0, 5, "=r,0,") == 0) {
SmallVector<StringRef, 4> Words;
SplitString(AsmPieces[0], Words, " \t,");
if (Words.size() == 3 && Words[0] == "rorw" && Words[1] == "$$8" &&
Words[2] == "${0:w}") {
Words.clear();
SplitString(AsmPieces[1], Words, " \t,");
if (Words.size() == 3 && Words[0] == "rorl" && Words[1] == "$$16" &&
Words[2] == "$0") {
Words.clear();
SplitString(AsmPieces[2], Words, " \t,");
if (Words.size() == 3 && Words[0] == "rorw" && Words[1] == "$$8" &&
Words[2] == "${0:w}") {
AsmPieces.clear();
const std::string &Constraints = IA->getConstraintString();
SplitString(StringRef(Constraints).substr(5), AsmPieces, ",");
std::sort(AsmPieces.begin(), AsmPieces.end());
if (AsmPieces.size() == 4 &&
AsmPieces[0] == "~{cc}" &&
AsmPieces[1] == "~{dirflag}" &&
AsmPieces[2] == "~{flags}" &&
AsmPieces[3] == "~{fpsr}") {
return LowerToBSwap(CI);
}
}
}
}
}
if (CI->getType()->isIntegerTy(64) && if (CI->getType()->isIntegerTy(64) &&
Constraints.size() >= 2 && Constraints.size() >= 2 &&
Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" && Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" &&

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@ -65,6 +65,13 @@ define i32 @t32(i32 %x) nounwind {
ret i32 %asmtmp ret i32 %asmtmp
} }
; CHECK: u32:
; CHECK: bswapl
define i32 @u32(i32 %x) nounwind {
%asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind
ret i32 %asmtmp
}
; CHECK: s64: ; CHECK: s64:
; CHECK: bswapq ; CHECK: bswapq
define i64 @s64(i64 %x) nounwind { define i64 @s64(i64 %x) nounwind {