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Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
No functional change intended. llvm-svn: 240639
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f1219360be
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@ -96,15 +96,10 @@ bool AArch64InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify) const {
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// If the block has no terminators, it just falls into the block after it.
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return false;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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return false;
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--I;
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}
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if (!isUnpredicatedTerminator(I))
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return false;
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@ -224,15 +219,10 @@ bool AArch64InstrInfo::ReverseBranchCondition(
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}
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unsigned AArch64InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return 0;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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return 0;
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--I;
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}
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if (!isUncondBranchOpcode(I->getOpcode()) &&
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!isCondBranchOpcode(I->getOpcode()))
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return 0;
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@ -697,15 +697,10 @@ R600InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
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// Most of the following comes from the ARM implementation of AnalyzeBranch
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// If the block has no terminators, it just falls into the block after it.
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return false;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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return false;
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--I;
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}
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// AMDGPU::BRANCH* instructions are only available after isel and are not
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// handled
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if (isBranch(I->getOpcode()))
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@ -367,14 +367,10 @@ ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin()) return 0;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return 0;
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--I;
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}
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if (!isUncondBranchOpcode(I->getOpcode()) &&
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!isCondBranchOpcode(I->getOpcode()))
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return 0;
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@ -196,15 +196,10 @@ XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify) const {
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// If the block has no terminators, it just falls into the block after it.
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return false;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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return false;
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--I;
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}
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if (!isUnpredicatedTerminator(I))
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return false;
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@ -312,14 +307,10 @@ XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
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unsigned
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XCoreInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin()) return 0;
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--I;
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while (I->isDebugValue()) {
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if (I == MBB.begin())
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return 0;
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--I;
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}
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if (!IsBRU(I->getOpcode()) && !IsCondBranch(I->getOpcode()))
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return 0;
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