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ADDmi{16,32} should be in the next case statement.
llvm-svn: 11547
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parent
135c4faa55
commit
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@ -121,7 +121,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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#endif
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case X86::ADDri16: case X86::ADDri32:
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case X86::ADDmi16: case X86::ADDmi32:
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case X86::SUBri16: case X86::SUBri32:
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case X86::ANDri16: case X86::ANDri32:
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case X86::ORri16: case X86::ORri32:
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@ -136,8 +135,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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default: assert(0 && "Unknown opcode value!");
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case X86::ADDri16: Opcode = X86::ADDri16b; break;
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case X86::ADDri32: Opcode = X86::ADDri32b; break;
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case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
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case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
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case X86::SUBri16: Opcode = X86::SUBri16b; break;
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case X86::SUBri32: Opcode = X86::SUBri32b; break;
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case X86::ANDri16: Opcode = X86::ANDri16b; break;
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@ -156,6 +153,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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return false;
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case X86::ADDmi16: case X86::ADDmi32:
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case X86::ANDmi16: case X86::ANDmi32:
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assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
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if (MI->getOperand(4).isImmediate()) {
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@ -165,6 +163,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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unsigned Opcode;
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switch (MI->getOpcode()) {
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default: assert(0 && "Unknown opcode value!");
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case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
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case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
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case X86::ANDmi16: Opcode = X86::ANDmi16b; break;
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case X86::ANDmi32: Opcode = X86::ANDmi32b; break;
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}
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