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Mark scalar FMA4 instructions as ignoring the VEX.L bit.
llvm-svn: 147602
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@ -87,11 +87,11 @@ multiclass fma3s_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,
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defm SDr231 : fma3s_rm<opc231, !strconcat(OpcodeStr, "231sd"), f64mem>, VEX_W;
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}
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defm VFMADD : fma3s_forms<0x99, 0xA9, 0xB9, "vfmadd">;
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defm VFMSUB : fma3s_forms<0x9B, 0xAB, 0xBB, "vfmsub">;
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defm VFMADD : fma3s_forms<0x99, 0xA9, 0xB9, "vfmadd">, VEX_LIG;
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defm VFMSUB : fma3s_forms<0x9B, 0xAB, 0xBB, "vfmsub">, VEX_LIG;
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defm VFNMADD : fma3s_forms<0x9D, 0xAD, 0xBD, "vfnmadd">;
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defm VFNMSUB : fma3s_forms<0x9F, 0xAF, 0xBF, "vfnmsub">;
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defm VFNMADD : fma3s_forms<0x9D, 0xAD, 0xBD, "vfnmadd">, VEX_LIG;
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defm VFNMSUB : fma3s_forms<0x9F, 0xAF, 0xBF, "vfnmsub">, VEX_LIG;
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//===----------------------------------------------------------------------===//
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// FMA4 - AMD 4 operand Fused Multiply-Add instructions
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