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ARM: restrict register class for WIN__DBZCHK

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WIN__DBZCHK will insert a CBZ instruction into the stream.  This instruction
reserves 3 bits for the condition register (rn).  As such, we must ensure that
we restrict the register to a low register.  Use the tGPR class instead of GPR
to ensure that this is properly constrained.  In debug builds, we would attempt
to use lr as a condition register which would silently get truncated with no
hint that the register selection was incorrect.

llvm-svn: 267080
This commit is contained in:
Saleem Abdulrasool 2016-04-21 23:53:19 +00:00
parent 27db5e9a0c
commit 4fb09b352f
2 changed files with 49 additions and 2 deletions
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4
lib/Target/ARM/ARMInstrInfo.td
View File

@ -5284,8 +5284,8 @@ let usesCustomInserter = 1, Uses = [R4], Defs = [R4, SP] in
def win__dbzchk : SDNode<"ARMISD::WIN__DBZCHK", SDT_WIN__DBZCHK,
[SDNPHasChain, SDNPSideEffect, SDNPOutGlue]>;
let usesCustomInserter = 1, Defs = [CPSR] in
def WIN__DBZCHK : PseudoInst<(outs), (ins GPR:$divisor), NoItinerary,
[(win__dbzchk GPR:$divisor)]>;
def WIN__DBZCHK : PseudoInst<(outs), (ins tGPR:$divisor), NoItinerary,
[(win__dbzchk tGPR:$divisor)]>;
//===----------------------------------------------------------------------===//
// TLS Instructions

47
test/CodeGen/ARM/Windows/dbzchk.ll
View File

@ -142,3 +142,50 @@ attributes #0 = { optsize }
; CHECK-CFG: bl __rt_udiv
; CHECK-CFG: pop.w {{{.*}}, r11, pc}
; RUN: llc -O0 -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK
; long k(void);
; int l(void);
; int j(int i) {
; if (l() == -1)
; return 0;
; return k() % i;
; }
declare arm_aapcs_vfpcc i32 @k()
declare arm_aapcs_vfpcc i32 @l()
define arm_aapcs_vfpcc i32 @j(i32 %i) {
entry:
%retval = alloca i32, align 4
%i.addr = alloca i32, align 4
store i32 %i, i32* %i.addr, align 4
%call = call arm_aapcs_vfpcc i32 @l()
%cmp = icmp eq i32 %call, -1
br i1 %cmp, label %if.then, label %if.end
if.then:
store i32 0, i32* %retval, align 4
br label %return
if.end:
%call1 = call arm_aapcs_vfpcc i32 @k()
%0 = load i32, i32* %i.addr, align 4
%rem = srem i32 %call1, %0
store i32 %rem, i32* %retval, align 4
br label %return
return:
%1 = load i32, i32* %retval, align 4
ret i32 %1
}
; CHECK-WIN__DBZCHK-LABEL: j:
; CHECK-WIN__DBZCHK: cbz r{{[0-7]}}, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz r8, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz r9, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz r10, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz r11, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz ip, .LBB
; CHECK-WIN__DBZCHK-NOT: cbz lr, .LBB