mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 02:52:53 +02:00
AMDGPU: Set hasSideEffects 0 on _term instructions
These were defaulting to true, but they are just wrappers around bit operations. This avoids regressions in the exec mask optimization passes in a future commit. llvm-svn: 356952
This commit is contained in:
parent
dbef91fa8b
commit
4fe7234576
@ -172,12 +172,14 @@ def S_MOV_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
|
||||
(ins SSrc_b64:$src0)> {
|
||||
let isAsCheapAsAMove = 1;
|
||||
let isTerminator = 1;
|
||||
let hasSideEffects = 0;
|
||||
}
|
||||
|
||||
def S_XOR_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
|
||||
(ins SSrc_b64:$src0, SSrc_b64:$src1)> {
|
||||
let isAsCheapAsAMove = 1;
|
||||
let isTerminator = 1;
|
||||
let hasSideEffects = 0;
|
||||
let Defs = [SCC];
|
||||
}
|
||||
|
||||
@ -185,6 +187,7 @@ def S_ANDN2_B64_term : SPseudoInstSI<(outs SReg_64:$dst),
|
||||
(ins SSrc_b64:$src0, SSrc_b64:$src1)> {
|
||||
let isAsCheapAsAMove = 1;
|
||||
let isTerminator = 1;
|
||||
let hasSideEffects = 0;
|
||||
}
|
||||
|
||||
def WAVE_BARRIER : SPseudoInstSI<(outs), (ins),
|
||||
|
Loading…
Reference in New Issue
Block a user