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Don't allow per-register spill size and alignment.

These values were not used for anything. Spill size and alignment is a property
of the register class, not the register.

llvm-svn: 129906
This commit is contained in:
Jakob Stoklund Olesen 2011-04-21 03:43:21 +00:00
parent ea02a6edaa
commit 5168088bcf
3 changed files with 0 additions and 14 deletions

View File

@ -32,17 +32,6 @@ class Register<string n> {
string Namespace = "";
string AsmName = n;
// SpillSize - If this value is set to a non-zero value, it is the size in
// bits of the spill slot required to hold this register. If this value is
// set to zero, the information is inferred from any register classes the
// register belongs to.
int SpillSize = 0;
// SpillAlignment - This value is used to specify the alignment required for
// spilling the register. Like SpillSize, this should only be explicitly
// specified if the register is not in a register class.
int SpillAlignment = 0;
// Aliases - A list of registers that this register overlaps with. A read or
// modification of this register can potentially read or modify the aliased
// registers.

View File

@ -29,7 +29,6 @@ namespace llvm {
struct CodeGenRegister {
Record *TheDef;
const std::string &getName() const;
unsigned DeclaredSpillSize, DeclaredSpillAlignment;
unsigned EnumValue;
unsigned CostPerUse;
CodeGenRegister(Record *R);

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@ -170,8 +170,6 @@ void CodeGenTarget::ReadRegisters() const {
}
CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
DeclaredSpillSize = R->getValueAsInt("SpillSize");
DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
CostPerUse = R->getValueAsInt("CostPerUse");
}