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AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp8

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This commit is contained in:
Matt Arsenault 2020-01-17 10:02:57 -05:00 committed by Matt Arsenault
parent 023bdc26f9
commit 517f60a00f
3 changed files with 4 additions and 1 deletions
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1
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
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@ -3103,6 +3103,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case Intrinsic::amdgcn_ds_permute:
case Intrinsic::amdgcn_ds_bpermute:
case Intrinsic::amdgcn_update_dpp:
case Intrinsic::amdgcn_mov_dpp8:
return getDefaultMappingAllVGPR(MI);
case Intrinsic::amdgcn_kernarg_segment_ptr:
case Intrinsic::amdgcn_s_getpc:

3
lib/Target/AMDGPU/VOP1Instructions.td
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@ -888,6 +888,7 @@ defm V_SCREEN_PARTITION_4SE_B32 : VOP1_Real_gfx9 <0x37>;
let OtherPredicates = [isGFX10Plus] in {
def : GCNPat <
(i32 (int_amdgcn_mov_dpp8 i32:$src, timm:$dpp8)),
(V_MOV_B32_dpp8_gfx10 $src, $src, (as_i32imm $dpp8), (i32 DPP8Mode.FI_0))
(V_MOV_B32_dpp8_gfx10 VGPR_32:$src, VGPR_32:$src,
(as_i32timm $dpp8), (i32 DPP8Mode.FI_0))
>;
} // End OtherPredicates = [isGFX10Plus]

1
test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll Normal file
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@ -0,0 +1 @@
; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %S/../llvm.amdgcn.mov.dpp8.ll | FileCheck -check-prefix=GFX10 %S/../llvm.amdgcn.mov.dpp8.ll