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Give helpers internal linkage. NFC.
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ac5dfb4241
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@ -21,23 +21,23 @@ char ReachingDefAnalysis::ID = 0;
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INITIALIZE_PASS(ReachingDefAnalysis, DEBUG_TYPE, "ReachingDefAnalysis", false,
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true)
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bool isValidReg(const MachineOperand &MO) {
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static bool isValidReg(const MachineOperand &MO) {
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return MO.isReg() && MO.getReg();
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}
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bool isValidRegUse(const MachineOperand &MO) {
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static bool isValidRegUse(const MachineOperand &MO) {
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return isValidReg(MO) && MO.isUse();
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}
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bool isValidRegUseOf(const MachineOperand &MO, int PhysReg) {
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static bool isValidRegUseOf(const MachineOperand &MO, int PhysReg) {
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return isValidRegUse(MO) && MO.getReg() == PhysReg;
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}
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bool isValidRegDef(const MachineOperand &MO) {
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static bool isValidRegDef(const MachineOperand &MO) {
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return isValidReg(MO) && MO.isDef();
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}
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bool isValidRegDefOf(const MachineOperand &MO, int PhysReg) {
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static bool isValidRegDefOf(const MachineOperand &MO, int PhysReg) {
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return isValidRegDef(MO) && MO.getReg() == PhysReg;
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}
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@ -441,7 +441,7 @@ const uint8_t MachO_x86_64_GOTAndStubsBuilder::StubContent[6] = {
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0xFF, 0x25, 0x00, 0x00, 0x00, 0x00};
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} // namespace
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Error optimizeMachO_x86_64_GOTAndStubs(LinkGraph &G) {
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static Error optimizeMachO_x86_64_GOTAndStubs(LinkGraph &G) {
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LLVM_DEBUG(dbgs() << "Optimizing GOT entries and stubs:\n");
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for (auto *B : G.blocks())
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@ -26,7 +26,7 @@ struct TypesAndMemOps {
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// Assumes power of 2 memory size. Subtargets that have only naturally-aligned
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// memory access need to perform additional legalization here.
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bool isUnalignedMemmoryAccess(uint64_t MemSize, uint64_t AlignInBits) {
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static bool isUnalignedMemmoryAccess(uint64_t MemSize, uint64_t AlignInBits) {
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assert(isPowerOf2_64(MemSize) && "Expected power of 2 memory size");
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assert(isPowerOf2_64(AlignInBits) && "Expected power of 2 align");
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if (MemSize > AlignInBits)
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@ -71,6 +71,7 @@ static llvm::Optional<ExpandedMatch> matchExpandedRem(Instruction &I) {
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return M;
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}
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namespace {
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/// A thin wrapper to store two values that we matched as div-rem pair.
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/// We want this extra indirection to avoid dealing with RAUW'ing the map keys.
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struct DivRemPairWorklistEntry {
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@ -111,6 +112,7 @@ struct DivRemPairWorklistEntry {
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}
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}
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};
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} // namespace
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using DivRemWorklistTy = SmallVector<DivRemPairWorklistEntry, 4>;
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/// Find matching pairs of integer div/rem ops (they have the same numerator,
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@ -3228,10 +3228,9 @@ bool BoUpSLP::areAllUsersVectorized(Instruction *I) const {
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});
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}
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std::pair<unsigned, unsigned> getVectorCallCosts(CallInst *CI,
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VectorType *VecTy,
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TargetTransformInfo *TTI,
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TargetLibraryInfo *TLI) {
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static std::pair<unsigned, unsigned>
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getVectorCallCosts(CallInst *CI, VectorType *VecTy, TargetTransformInfo *TTI,
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TargetLibraryInfo *TLI) {
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Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
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// Calculate the cost of the scalar and vector calls.
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