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[NFC] Update the test to check the endianness after the CodeGenPrepare instead of checking the assembly instructions.
llvm-svn: 362471
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@ -1,14 +1,22 @@
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; Test that CodeGenPrepare respects endianness when splitting a store.
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;
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -force-split-store < %s | FileCheck %s
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -stop-after codegenprepare -force-split-store < %s | FileCheck %s
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define void @fun(i16* %Src, i16* %Dst) {
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; CHECK-LABEL: # %bb.0:
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; CHECK: lh %r0, 0(%r2)
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; CHECK-NEXT: stc %r0, 1(%r3)
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; CHECK-NEXT: srl %r0, 8
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; CHECK-NEXT: stc %r0, 0(%r3)
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; CHECK-NEXT: br %r14
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; CHECK-LABEL: @fun(
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; CHECK: %1 = load i16, i16* %Src
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; CHECK-NEXT: %2 = trunc i16 %1 to i8
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; CHECK-NEXT: %3 = lshr i16 %1, 8
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; CHECK-NEXT: %4 = trunc i16 %3 to i8
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; CHECK-NEXT: %5 = zext i8 %2 to i16
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; CHECK-NEXT: %6 = zext i8 %4 to i16
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; CHECK-NEXT: %7 = shl nuw i16 %6, 8
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; CHECK-NEXT: %8 = or i16 %7, %5
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; CHECK-NEXT: %9 = bitcast i16* %Dst to i8*
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; CHECK-NEXT: %10 = getelementptr i8, i8* %9, i32 1
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; CHECK-NEXT: store i8 %2, i8* %10
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; CHECK-NEXT: %11 = bitcast i16* %Dst to i8*
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; CHECK-NEXT: store i8 %4, i8* %11
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%1 = load i16, i16* %Src
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%2 = trunc i16 %1 to i8
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%3 = lshr i16 %1, 8
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