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CodeGen: use MSVC division on windows itanium
Windows itanium is identical to MSVC when dealing with everything but C++. Lower the math routines into msvcrt rather than compiler-rt. llvm-svn: 284175
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@ -114,7 +114,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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addBypassSlowDiv(64, 16);
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addBypassSlowDiv(64, 16);
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}
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}
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if (Subtarget.isTargetKnownWindowsMSVC()) {
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if (Subtarget.isTargetKnownWindowsMSVC() ||
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Subtarget.isTargetWindowsItanium()) {
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// Setup Windows compiler runtime calls.
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// Setup Windows compiler runtime calls.
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setLibcallName(RTLIB::SDIV_I64, "_alldiv");
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setLibcallName(RTLIB::SDIV_I64, "_alldiv");
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setLibcallName(RTLIB::UDIV_I64, "_aulldiv");
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setLibcallName(RTLIB::UDIV_I64, "_aulldiv");
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38
test/CodeGen/X86/divide-windows-itanium.ll
Normal file
38
test/CodeGen/X86/divide-windows-itanium.ll
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@ -0,0 +1,38 @@
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; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
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define i64 @f(i64 %i, i64 %j) {
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%1 = sdiv i64 %i, %j
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ret i64 %1
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}
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; CHECK-LABEL: _f:
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; CHECK-NOT: calll ___divdi3
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; CHECK: calll __alldiv
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define i64 @g(i64 %i, i64 %j) {
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%1 = udiv i64 %i, %j
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ret i64 %1
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}
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; CHECK-LABEL: _g:
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; CHECK-NOT: calll ___udivdi3
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; CHECK: calll __aulldiv
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define i64 @h(i64 %i, i64 %j) {
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%1 = srem i64 %i, %j
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ret i64 %1
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}
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; CHECK-LABEL: _h:
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; CHECK-NOT: calll ___moddi3
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; CHECK: calll __allrem
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define i64 @i(i64 %i, i64 %j) {
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%1 = urem i64 %i, %j
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ret i64 %1
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}
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; CHECK-LABEL: _i:
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; CHECK-NOT: calll ___umoddi3
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; CHECK: calll __aullrem
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